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Efficient Analysis of Pipeline Models for WCET Computation

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Abstract

Worst-case execution time (WCET) prediction for modern CPU’s cannot make local assumptions about the impact of input information on the global worst-case because of the existence of timing anomalies. Therefore, static analyses on the hardware level must consider a large subset of the reachable states of the underlying hardware model. As the number of states grows, WCET prediction can become infeasible because of the increase in computation time and memory consumption. This paper presents a solution for this problem by defining the static analysis of processor pipelines for WCET computation in terms of operations on binary decision diagrams (BDD’s).

BibTeX - Entry

@InProceedings{wilhelm:OASIcs:2007:814,
  author =	{Stephan Wilhelm},
  title =	{{Efficient Analysis of Pipeline Models for WCET Computation}},
  booktitle =	{5th International Workshop on Worst-Case Execution Time Analysis (WCET'05)},
  series =	{OpenAccess Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-24-8},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{1},
  editor =	{Reinhard Wilhelm},
  publisher =	{Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2007/814},
  URN =		{urn:nbn:de:0030-drops-8149},
  doi =		{http://dx.doi.org/10.4230/OASIcs.WCET.2005.814},
  annote =	{Keywords: Worst-case execution time prediction, pipeline analysis, timing anomalies, binary decision diagrams }
}

Keywords: Worst-case execution time prediction, pipeline analysis, timing anomalies, binary decision diagrams
Seminar: 5th International Workshop on Worst-Case Execution Time Analysis (WCET'05)
Issue date: 2007
Date of publication: 2007


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