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WCET Analysis of HLS-Generated Processors Using Abstract Interpretation

Authors Thomas Feuilletin , Dylan Leothaud , Simon Rokicki , Steven Derrien , Isabelle Puaut

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LIPIcs.ECRTS.2026.14.pdf
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Document Identifiers

Subject Classification

ACM Subject Classification
  • Hardware → Static timing analysis
Keywords
  • Static Analysis
  • Worst-Case Execution Time
  • High-Level Synthesis

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Abstract

Deriving sound and precise timing models remains one of the main obstacles to static Worst-Case Execution Time (WCET) analysis. Modern processors exhibit diverse and evolving microarchitectures, making manual construction of timing models labor-intensive, error-prone, and difficult to adapt across processor variants. High-Level Synthesis (HLS) enables rapid customization of processor cores and architectural exploration, offering an opportunity to automate not only hardware generation but also the derivation of associated timing models.
This paper presents an automated WCET analysis for HLS-generated processors based on abstract interpretation. We exploit the internal Gated-SSA representation of the HLS flow to automatically extract an abstract timing model capturing speculation and stall mechanisms. WCET estimation at the basic block level is then formulated as an exploration of abstract microarchitectural states within a basic block.
The approach safely accounts for timing anomalies, while remaining scalable thanks to an efficient state-merging strategy. Integrated into the Heptane WCET tool and evaluated on Mälardalen benchmarks and a RISC-V, the method achieves the same tightness as a handcrafted timing model, while improving over a previously proposed automated approach.

Cite As Get BibTex

Thomas Feuilletin, Dylan Leothaud, Simon Rokicki, Steven Derrien, and Isabelle Puaut. WCET Analysis of HLS-Generated Processors Using Abstract Interpretation. In 38th European Conference on Real-Time Systems (ECRTS 2026). Leibniz International Proceedings in Informatics (LIPIcs), Volume 375, pp. 14:1-14:19, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2026) https://doi.org/10.4230/LIPIcs.ECRTS.2026.14

Author Details

Thomas Feuilletin
  • Univ Rennes, Inria, CNRS, IRISA, France
Dylan Leothaud
  • Univ Rennes, Inria, CNRS, IRISA, France
Simon Rokicki
  • Univ Rennes, Inria, CNRS, IRISA, France
Steven Derrien
  • UBO, Lab-STICC, Brest, France
Isabelle Puaut
  • Univ Rennes, Inria, CNRS, IRISA, France

Funding

  • Feuilletin, Thomas: ANR LOTR - https://lotr.gitlabpages.inria.fr/website/.

Supplementary Materials

References

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