Document Open Access Logo

A Certifiable Approach to Multicore Using Ada

Author José F. Ruiz

PDF

File

Thumbnail PDF
PDF
OASIcs.AEiC.2026.3.pdf
  • Filesize: 0.55 MB
  • 15 pages

Document Identifiers

Subject Classification

ACM Subject Classification
  • Software and its engineering → Concurrent programming structures
  • Software and its engineering → Software safety
Keywords
  • multicore
  • certification
  • Ada

Metrics

Abstract

The adoption of multicore processors in safety-critical systems, such as avionics, automotive, and rail, introduces significant certification challenges, primarily related to determinism, predictability, and interference management. This paper examines how the Ada programming language, together with its restricted tasking profiles (Ravenscar and Jorvik) and bare-metal run-time libraries, provide a robust and certifiable execution model for multicore systems compliant with guidance such as AC 20-193.
By enforcing static task partitioning, fixed-priority scheduling, and a simple synchronization model, the Ada approach systematically limits interference channels and timing variability. This model enables accurate schedulability analysis, simplifies verification activities, and allows the multicore run-time library itself and the application built on top of it to be certified.

Cite As Get BibTex

José F. Ruiz. A Certifiable Approach to Multicore Using Ada. In 30th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2026). Open Access Series in Informatics (OASIcs), Volume 143, pp. 3:1-3:15, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2026) https://doi.org/10.4230/OASIcs.AEiC.2026.3

Author Details

José F. Ruiz
  • AdaCore, 46 rue d'Amsterdam, 75009 Paris, France

References

  1. Aeroflex Gaisler. LEON3 Multiprocessing CPU Core, 2010. Google Scholar
  2. Airframe Section AIR-622. AC 20-193: Use Multi-Core Processors. Technical report, Federal Aviation Administration, 2024. Google Scholar
  3. B. Andersson, S. Baruah, and J. Jonsson. Static-priority scheduling on multiprocessors. In RTSS'01: Proceedings of the 22nd IEEE Real-Time Systems Symposium. IEEE Computer Society, 2001. Google Scholar
  4. ARINC. ARINC Specification 653, Avionics Application Software Standard Interface. Aeronautical Radio, Inc, 2005. Google Scholar
  5. Arm Ltd. Arm Architecture Reference Manual: for A-profile architecture, m.a.a edition, 2025. URL: https://developer.arm.com/documentation/ddi0487.
  6. CENELEC. EN 50128, Railway applications – Communications, signalling and processing systems – Software for railway control and protection systems, July 2011. Google Scholar
  7. Fabien Chouteau and José F. Ruiz. Design and implementation of a Ravenscar extension for multiprocessors. In A. Romanovsky and T. Vardanega, editors, Ada-Europe 2011, 16th International Conference on Reliable Software Technologies, volume 6652 of Lecture Notes in Computer Science (LNCS). Springer, 2011. URL: https://doi.org/10.1007/978-3-642-21338-0_3.
  8. ISO. ISO 26262, Road Vehicules - Functional Safety, 2018. Google Scholar
  9. ISO/IEC/JTC1/SC22/WG9. Ada 2005 Reference Manual: Language and Standard Libraries. International Standard ANSI/ISO/IEC-8652:1995 (E) with Technical Corrigendum 1 and Amendment 1, 2006. Available from Springer-Verlag, LNCS no. 4348. Google Scholar
  10. ISO/IEC/JTC1/SC22/WG9. Ada 2012 Reference Manual: Language and Standard Libraries. International Standard ANSI/ISO/IEC-8652:2012/Cor 1:2016 with 2016 corrections, 2016. Google Scholar
  11. ISO/IEC/JTC1/SC22/WG9. Ada 2022 Reference Manual: Language and Standard Libraries. International Standard ANSI/ISO/IEC-8652:2023 (E) with Technical Corrigendum 1, 2023. Google Scholar
  12. M. Joseph and P. Pandya. Finding response times in real-time systems. BCS Computer Journal, 29(5):390-395, 1986. URL: https://doi.org/10.1093/COMJNL/29.5.390.
  13. C. L. Liu and J. W. Layland. Scheduling algorithms for multiprogramming in a hard-real-time environment. Journal of the ACM, 20(1), 1973. URL: https://doi.org/10.1145/321738.321743.
  14. John W. McCormick and Peter C. Chapin. Building High Integrity Applications with SPARK. Cambridge University Press, 2015. Google Scholar
  15. RTCA. DO-254: Design Assurance Guidance for Airborne Electronic Hardware, April 2000. Google Scholar
  16. RTCA. DO-178C: Software Considerations in Airborne Systems and Equipment Certification, December 2011. Google Scholar
  17. SAE International. ARP4754A: Guidelines for Development of Civil Aircraft and Systems, December 2010. Google Scholar
  18. S. Swaminathan, J. Stultz, J. F. Vogel, and Paul E. McKenney. Fairlocks - A high performance fair locking scheme. In International Conference on Parallel and Distributed Computing Systems, pages 241-246, 2002. Google Scholar
  19. Certification Authorities Software Team. CAST 32A Multi-core Processors. Technical report, Federal Aviation Administration, 2016. Google Scholar
  20. Juan Zamorano, Alejandro Alonso, José Antonio Pulido, and Juan Antonio de la Puente. Implementing execution-time clocks for the ada Ravenscar profile. In Albert Llamosí and Alfred Strohmeier, editors, Reliable Software Technologies - Ada-Europe 2004, pages 132-143, Berlin, Heidelberg, 2004. Springer Berlin Heidelberg. URL: https://doi.org/10.1007/978-3-540-24841-5_10.
  21. Juan Zamorano, José F. Ruiz, and Juan A. de la Puente. Implementing Ada.Real_Time.Clock and absolute delays in real-time kernels. In D. Craeynest and A. Strohmeier, editors, Reliable Software Technologies - Ada-Europe 2001, number 2043 in Lecture Notes in Computer Science. Springer-Verlag, 2001. Google Scholar
Any Issues?
X

Feedback on the Current Page

CAPTCHA

Thanks for your feedback!

Feedback submitted to Dagstuhl Publishing

Could not send message

Please try again later or send an E-mail
© 2023-2026 Schloss Dagstuhl – LZI GmbH Schloss Dagstuhl – LZI GmbH About DROPS Imprint Privacy Contact