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SP-IMPact: A Framework for Static Partitioning Interference Mitigation and Performance Analysis

Authors Diogo Costa , Gonçalo Moreira , Afonso Oliveira , José Martins , Sandro Pinto

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Author Details

Diogo Costa
  • Centro ALGORITMI / LASI, Universidade do Minho, Portugal
Gonçalo Moreira
  • Centro ALGORITMI / LASI, Universidade do Minho, Portugal
Afonso Oliveira
  • Centro ALGORITMI / LASI, Universidade do Minho, Portugal
José Martins
  • Centro ALGORITMI / LASI, Universidade do Minho, Portugal
Sandro Pinto
  • Centro ALGORITMI / LASI, Universidade do Minho, Portugal

Funding

  • Costa, Diogo: Supported by FCT grant 2022.13378.BD.
  • Martins, José: Supported by FCT grant SFRH/BD/138660/2018.

Cite As Get BibTex

Diogo Costa, Gonçalo Moreira, Afonso Oliveira, José Martins, and Sandro Pinto. SP-IMPact: A Framework for Static Partitioning Interference Mitigation and Performance Analysis. In Sixth Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2025). Open Access Series in Informatics (OASIcs), Volume 128, pp. 5:1-5:15, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2025) https://doi.org/10.4230/OASIcs.NG-RES.2025.5

Abstract

Modern embedded systems are evolving toward complex, heterogeneous architectures to accommodate increasingly demanding applications. Driven by industry SWAP-C (Size, Weight, Power, and Cost) constraints, this shift has led to the consolidation of multiple systems onto single hardware platforms. Static Partitioning Hypervisors (SPHs) offer a promising solution to partition hardware resources and provide spatial isolation between critical workloads. However, shared hardware resources like the Last-Level Cache (LLC) and system bus can introduce significant temporal interference between virtual machines (VMs), negatively impacting performance and predictability. Over the past decade, academia and industry have focused on developing interference mitigation techniques, such as cache partitioning and memory bandwidth reservation. Configuring these techniques, however, is complex and time-consuming. Cache partitioning requires careful balancing of cache sections across VMs, while memory bandwidth reservation requires tuning bandwidth budgets and periods. With numerous possible configurations, testing all combinations is impractical and often leads to suboptimal configurations. Moreover, there is a gap in understanding how these techniques interact, as their combined use can result in compounded or conflicting effects on system performance. Static analysis solutions that estimate worst-case execution times (WCET) and upper bounds on execution times provide some guidance for configuring interference mitigation techniques. While useful in identifying potential interference effects, these tools often fail to capture the full complexity of modern multi-core systems, as they typically focus on a limited set of shared resources and neglect other sources of contention, such as IOMMUs and interrupt controllers. To address these challenges, we introduce SP-IMPact, an open-source framework designed to analyze and guide the configuration of interference mitigation techniques, through the deployment of diverse VM configurations and setups, and assessment of hardware-level contention (leveraging SPHs). It supports two mitigation techniques: (i) cache coloring and (ii) memory bandwidth reservation, while also evaluating the interactions between these techniques and their cumulative impact on system performance. By providing insights on real hardware platforms, SP-IMPact helps to optimize the configuration of these techniques in mixed-criticality systems, ensuring both performance and predictability.

Subject Classification

ACM Subject Classification
  • Computer systems organization → Real-time system specification
  • Computer systems organization → Embedded software
Keywords
  • Virtualization
  • Contention
  • Multi-core Interference
  • Mixed-Criticality Systems
  • Arm

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