The Variability of Application Execution Times on a Multi-Core Platform

Authors Vincent Nélis, Patrick Meumeu Yomsi, Luís Miguel Pinho

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Vincent Nélis
Patrick Meumeu Yomsi
Luís Miguel Pinho

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Vincent Nélis, Patrick Meumeu Yomsi, and Luís Miguel Pinho. The Variability of Application Execution Times on a Multi-Core Platform. In 16th International Workshop on Worst-Case Execution Time Analysis (WCET 2016). Open Access Series in Informatics (OASIcs), Volume 55, pp. 6:1-6:11, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2016)


It is a known fact that processes running concurrently on different cores in a multicore environment interfere with each other on the processor shared resources. The contention on these shared resources considerably slows down the execution on every core since sometimes the cores must stall while their requests to access the resources are being served. But by how much the execution may be slowed down due to this interference? In this paper we answer this question with numbers coming from experimentation. That is, we quantify the magnitude of the impact of the interference on the execution time by running programs taken from the TACLeBench benchmark suite, a popular benchmark suite in the real-time research community, on the first generation of Kalray manycore processor family, the MPPA-256 (the development board) that goes by the codename "Andey".
  • Execution time variability
  • timing analysis
  • WCET estimates
  • multi-cores
  • many-cores


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  1. Benoît Dupont de Dinechin, Yves Durand, Duco van Amstel, and Alexandre Ghiti. Guaranteed services of the noc of a manycore processor. In Proceedings of the 2014 International Workshop on Network on Chip Architectures, NoCArc'14, Cambridge, United Kingdom, December 13-14, 2014, pages 11-16, 2014. URL:
  2. Benoît Dupont de Dinechin, Duco van Amstel, Marc Poulhiès, and Guillaume Lager. Time-critical computing on a single-chip massively parallel processor. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, pages 1-6, 2014. URL:
  3. Benjamin Lesage, David Griffin, Sebastian Altmeyer, and Robert I. Davis. Static probabilistic timing analysis for multi-path programs. In 2015 IEEE Real-Time Systems Symposium, RTSS 2015, San Antonio, Texas, USA, December 1-4, 2015, pages 361-372, 2015. URL:
  4. Vincent Nélis, Patrick Meumeu Yomsi, and Luís Miguel Pinho. Methodologies for the WCET analysis of parallel applications on many-core architectures. In 2015 Euromicro Conference on Digital System Design, DSD 2015, Madeira, Portugal, August 26-28, 2015, pages 748-755, 2015. URL:
  5. Timing Analysis on Code-Level. Accessed: 2016-05-06.
  6. Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter Puschner, Jan Staschulat, and Per Stenström. The Worst-case Execution-time Problem; Overview of Methods and Survey of Tools. ACM Trans. Embed. Comput. Syst., 7(3):36:1-36:53, 2008. Google Scholar
  7. Reinhard Wilhelm, Daniel Grund, Jan Reineke, Marc Schlickling, Markus Pister, and Christian Ferdinand. Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems. IEEE Trans. on CAD of Integrated Circuits and Systems, 28(7):966-978, 2009. URL: