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An Evaluation of the State-Of-The-Art Software and Hardware Implementations of BIKE

Authors Andrea Galimberti , Gabriele Montanaro , William Fornaciari , Davide Zoni



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Author Details

Andrea Galimberti
  • Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB), Politecnico di Milano, Italy
Gabriele Montanaro
  • Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB), Politecnico di Milano, Italy
William Fornaciari
  • Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB), Politecnico di Milano, Italy
Davide Zoni
  • Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB), Politecnico di Milano, Italy

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Andrea Galimberti, Gabriele Montanaro, William Fornaciari, and Davide Zoni. An Evaluation of the State-Of-The-Art Software and Hardware Implementations of BIKE. In 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2023). Open Access Series in Informatics (OASIcs), Volume 107, pp. 4:1-4:12, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
https://doi.org/10.4230/OASIcs.PARMA-DITAM.2023.4

Abstract

NIST is conducting a process for the standardization of post-quantum cryptosystems, i.e., cryptosystems that are resistant to attacks by both traditional and quantum computers and that can thus substitute the traditional public-key cryptography solutions which are expected to be broken by quantum computers in the next decades. This manuscript provides an overview and a comparison of the existing state-of-the-art implementations of the BIKE QC-MDPC code-based post-quantum KEM, a candidate in NIST’s PQC standardization process. We consider both software, hardware, and mixed hardware-software implementations and evaluate their performance and, for hardware ones, their resource utilization.

Subject Classification

ACM Subject Classification
  • Security and privacy → Public key encryption
  • Hardware → Hardware accelerators
  • Hardware → Hardware-software codesign
Keywords
  • Post-quantum cryptography
  • QC-MDPC code-based cryptography
  • BIKE
  • software execution
  • hardware acceleration
  • hardware-software co-design
  • performance evaluation

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