Schloss Dagstuhl - Leibniz-Zentrum für Informatik GmbH Schloss Dagstuhl - Leibniz-Zentrum für Informatik GmbH scholarly article en Mossé, Daniel; AbouGhazaleh, Nevine; Childers, Bruce; Melhem, Rami License: Creative Commons Attribution 4.0 license (CC BY 4.0)
when quoting this document, please refer to the following
URN: urn:nbn:de:0030-drops-3049

; ; ;

Energy Conservation in Memory Hierarchies using Power-Aware Cached-DRAM



Main memory has become one of the largest contributors to
overall energy consumption and offers many opportunities for power/energy
reduction. In this paper, we propose a new memory organization, called
{em Power-Aware Cached-DRAM} (PA-CDRAM), that integrates a moderately
sized cache directly into a memory device. We use this cache to
turn a memory bank off immediately after a memory access to reduce
energy consumption. While other work has used CDRAM to improve
memory performance, we modify CDRAM to reduce energy consumption.
In this paper, we describe our memory organization and describe
the challenges for achieving low energy consumption and how to address
them. We evaluate the approach using a cycle accurate processor and
memory simulator. Our results show that PA-CDRAM achieves an average
28% improvement in the energy-delay product when compared to
a time-out power management technique.

BibTeX - Entry

  author =	{Moss\'{e}, Daniel and AbouGhazaleh, Nevine and Childers, Bruce and Melhem, Rami},
  title =	{{Energy Conservation in Memory Hierarchies using Power-Aware Cached-DRAM}},
  booktitle =	{Power-aware Computing Systems},
  pages =	{1--10},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2005},
  volume =	{5141},
  editor =	{Luca Benini and Ulrich Kremer and Christian W. Probst and Peter Schelkens},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{},
  URN =		{urn:nbn:de:0030-drops-3049},
  doi =		{10.4230/DagSemProc.05141.5},
  annote =	{Keywords: Memory power management, cached DRAM}

Keywords: Memory power management, cached DRAM
Seminar: 05141 - Power-aware Computing Systems
Issue date: 2005
Date of publication: 02.11.2005

DROPS-Home | Fulltext Search | Imprint | Privacy Published by LZI