OASIcs.MEMICS.2010.93.pdf
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Fast Translated Simulation of ASIPs
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Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'10) -- Selected Papers (MEMICS 2010)
Series: Open Access Series in Informatics (OASIcs) - License:
Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported license
- Publication Date: 2011-03-11
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Zdenek Prikryl, Jakub Kroustek, Tomas Hruska, and Dusan Kolar. Fast Translated Simulation of ASIPs. In Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'10) -- Selected Papers. Open Access Series in Informatics (OASIcs), Volume 16, pp. 93-100, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2011)
https://doi.org/10.4230/OASIcs.MEMICS.2010.93
https://doi.org/10.4230/OASIcs.MEMICS.2010.93
Abstract
Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools should be generated automatically based on a processor description. One of the most important tools is the simulator. It is used during a testing phase of the processor design and during target software development. The key feature of the simulator is its speed. The concept of a special simulation type translated simulation is presented in this paper. This simulation exploits information from a target C compiler. Both the simulator and the C compiler are generated based on the processor description in an architecture description language ISAC. Experimental results of this concept show very good simulation speed and fast generation of the simulator.
Keywords
- Hardware/sofware co-design
- simulation
- architecture description languages
- application-specific instruction set processors
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