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Bare-Metal Execution of Hard Real-Time Tasks Within a General-Purpose Operating System

Authors Georg Wassen, Stefan Lankes

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Georg Wassen
Stefan Lankes

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Georg Wassen and Stefan Lankes. Bare-Metal Execution of Hard Real-Time Tasks Within a General-Purpose Operating System. In 15th International Workshop on Worst-Case Execution Time Analysis (WCET 2015). Open Access Series in Informatics (OASIcs), Volume 47, pp. 75-84, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2015) https://doi.org/10.4230/OASIcs.WCET.2015.75

Abstract

Integrating high performance and real-time demands on multi-processor systems is a challenging task. We present our concept of isolating processes from a general-purpose operating system without deeply invading modifications. This allows executing code on dedicated CPUs with minimum latency and jitter like bare-metal on micro-controllers. The unbounded execution of mixed critical processes on the same system induces performance interference in real-time tasks. We present the implementation of isolated partitions on multi-processor x86 systems running Linux and describe challenges restoring operating system stability. This work also presents our experience with Non-Uniform Memory Access architectures that allow to partition the system in a way that the impact to memory and I/O transfers of other partitions is minimized.

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Keywords
  • Hard Real-Time System
  • High-Performance Computing
  • Non-uniform Memory Access
  • Bare-Metal Execution

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References

  1. Stanley Bak, Emiliano Betti, Rodolfo Pellizzoni, Marco Caccamo, and Lui Sha. Real-Time Control of I/O COTS Peripherals for Embedded Systems. In Proc. 30th IEEE Real-Time Systems Symp. (RTSS), pages 193-203. IEEE, 2009. Google Scholar
  2. Ajay V. Bhatt. Creating a PCI Express Interconnect. White paper, Technology and Research Labs, Intel Corp., Santa Clara, CA, USA, 2002. Google Scholar
  3. Frédéric Boniol, Hugues Cassé, Eric Noulard, and Claire Pagetti. Deterministic Execution Model on COTS Hardware. In Andreas Herkersdorf, Kay Römer, and Uwe Brinkschulte, editors, Proc. 25th Int. Conf. Architecture of Computing Systems (ARCS), volume 7179 of LNCS, pages 98-110. Springer, 2012. Google Scholar
  4. Björn B. Brandenburg, John M. Calandrino, and James H. Anderson. On the Scalability of Real-Time Scheduling Algorithms on Multicore Platforms: A Case Study. In Proc. 29th IEEE Real-Time Systems Symp. (RTSS), pages 157-169. IEEE, 2008. Google Scholar
  5. Timothy Brecht. On the importance of parallel application placement in NUMA multiprocessors. In 4th Symp. on Experiences with Distributed and Multiprocessor Systems (SEDMS), pages 1-18, 1993. Google Scholar
  6. Steve Brosky and Steve Rotolo. Shielded Processors: Guaranteeing Sub-millisecond Response in Standard Linux. In Proc. 2003 IEEE Int. Parallel and Distributed Processing Symp. (IPDPS). IEEE, 2003. Google Scholar
  7. Dakshina Dasari, Benny Akesson, Vincent Nélis, Muhammad Ali Awan, and Stefan M. Petters. Identifying the Sources of Unpredictability in COTS-based Multicore Systems. In Proc. 8th IEEE Int. Symp. on Industrial Embedded Systems (SIES), pages 39-48. IEEE, 2013. Google Scholar
  8. Dakshina Dasari, Björn Andersson, Vincent Nélis, Stefan M. Petters, et al. Response Time Analysis of COTS-Based Multicores Considering the Contention on the Shared Memory Bus. In IEEE 10th Int. Conf. on Trust, Security and Privacy in Computing and Communications (TrustCom), pages 1068-1075. IEEE, 2011. Google Scholar
  9. Shawn Embleton, Sherri Sparks, and Cliff Zou. SMM Rootkits: A New Breed of OS Independent Malware. In Proc. of the 4th Int. Conf. on Security and Privacy in Communication Networks (SecureComm), pages 11:1-11:12. ACM, 2008. Google Scholar
  10. Agner Fog. Software optimization manuals. Technical University of Denmark, Copenhagen, Denmark, 2013. URL: http://www.agner.org/optimize/.
  11. Georg Hager and Gerhard Wellein. Introduction to High Performance Computing for Scientists and Engineers. CRC Press, Inc., Boca Raton, FL, USA, 2010. Google Scholar
  12. Maurice Herlihy. Wait-Free Synchronization. ACM Trans. Program. Lang. Syst., 13(1):124-149, 1991. Google Scholar
  13. Aamer Jaleel, Eric Borch, Malini Bhandaru, Simon C. Steely Jr., and Joel Emer. Achieving Non-Inclusive Cache Performance with Inclusive Caches. In Proc. 43nd Annu. IEEE/ACM Int. Symp. on Microarchitecture (MICRO), pages 151-162. IEEE, 2010. Google Scholar
  14. Zoltan Majo and Thomas R. Gross. Memory Management in NUMA Multicore Systems: Trapped Between Cache Contention and Interconnect Overhead. In Proc. Int. Symp. on Memory Management (ISMM), pages 11-20. ACM, 2011. Google Scholar
  15. Rodolfo Pellizzoni, Emiliano Betti, Stanley Bak, Gang Yao, et al. A Predictable Execution Model for COTS-based Embedded Systems. In Proc. of 17th IEEE Real-Time and Embedded Technology and Applications Symp. (RTAS), pages 269-279. IEEE, 2011. Google Scholar
  16. Rodolfo Pellizzoni, Bach D. Bui, Marco Caccamo, and Lui Sha. Coscheduling of CPU and I/O Transactions in COTS-Based Embedded Systems. In Proc. 29th IEEE Real-Time Systems Symp. (RTSS), pages 221-231. IEEE, 2008. Google Scholar
  17. Peter Puschner and Martin Schoeberl. On Composable System Timing, Task Timing, and WCET Analysis. In Raimund Kirner, editor, 8th Int. Workshop on Worst-Case Execution Time Analysis (WCET), volume 8, Dagstuhl, Germany, 2008. Schloss Dagstuhl - Leibniz-Zentrum für Informatik. Google Scholar
  18. Simon Schliecker and Rolf Ernst. Real-time Performance Analysis of Multiprocessor Systems with Shared Memory. ACM Trans. Embed. Comput. Syst., 10(2):22:1-22:27, 2011. Google Scholar
  19. Philippe. Stellwag, Alexander Ditter, and Wolfgang Schröder-Preikschat. A Wait-Free Queue for Multiple Enqueuers and Multiple Dequeuers Using Local Preferences and Pragmatic Extensions. In Proc. 4th IEEE Int. Symp. on Industrial Embedded Systems (SIES), pages 237-248. IEEE, 2009. Google Scholar
  20. Jürgen Stohr. Auswirkungen der Peripherieanbindung auf das Realzeitverhalten PC-basierter Multiprozessorsysteme. Doctoral dissertation, Fakultät für Elektrotechnik und Informationstechnik, TU München, Munich, Germany, March 2006. Google Scholar
  21. Jürgen Stohr, Alexander von Bulow, and Georg Färber. Bounding Worst-Case Access Times in Modern Multiprocessor Systems. In Proc. 17th Euromicro Conf. on Real-Time Systems (ECRTS), pages 189-198. IEEE, 2005. Google Scholar
  22. Herb Sutter. The Free Lunch Is Over. Dr. Dobb’s Journal, 30(3), March 2005. Google Scholar
  23. Georg Wassen, Stefan Lankes, and Thomas Bemmerl. Harte Echtzeit für Anwendungsprozesse in Standard-Betriebssystemen auf Mehrkernprozessoren. In Wolfgang A. Halang, editor, Herausforderungen durch Echtzeitbetrieb, Informatik aktuell, pages 39-48, Berlin, Germany, 2012. Springer. Google Scholar
  24. Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, et al. The Worst-Case Execution-Time Problem - Overview of Methods and Survey of Tools. ACM Trans. Embed. Comput. Syst., 7(3):36:1-36:53, 2008. Google Scholar
  25. Reinhard Wilhelm and Jan Reineke. Embedded Systems: Many Cores - Many Problems. In Proc. 7th IEEE Int. Symp. on Industrial Embedded Systems (SIES), pages 176-180. IEEE, 2012. Google Scholar
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