RUST-Encoded Stream Ciphers on a RISC-V Parallel Ultra-Low-Power Processor (Invited Paper)

Authors Francesco Barchi , Giacomo Pasini , Emanuele Parisi , Giuseppe Tagliavini , Andrea Bartolini , Andrea Acquaviva



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Author Details

Francesco Barchi
  • University of Bologna, Italy
Giacomo Pasini
  • University of Bologna, Italy
Emanuele Parisi
  • University of Bologna, Italy
Giuseppe Tagliavini
  • University of Bologna, Italy
Andrea Bartolini
  • University of Bologna, Italy
Andrea Acquaviva
  • University of Bologna, Italy

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Francesco Barchi, Giacomo Pasini, Emanuele Parisi, Giuseppe Tagliavini, Andrea Bartolini, and Andrea Acquaviva. RUST-Encoded Stream Ciphers on a RISC-V Parallel Ultra-Low-Power Processor (Invited Paper). In 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2023). Open Access Series in Informatics (OASIcs), Volume 107, pp. 3:1-3:12, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023) https://doi.org/10.4230/OASIcs.PARMA-DITAM.2023.3

Abstract

Nowadays, the development of security applications is a relevant topic in the Internet of Things (IoT) and cyber-physical systems (CPS) fields. Different embedded architectures have been adopted in these areas, but the RISC-V parallel ultra-low-power (PULP) architecture stands out as a particularly efficient system. However, it has never been proposed to enable cryptography. In the context of video stream security, stream ciphers enable an efficient solution to ensure data privacy, and the exploitation of the PULP multi-core accelerator cluster paves the way to an efficient implementation of these ciphers. In this paper, we exploit the capability of the PULP architecture coupled with the code safety provided by the RUST programming language to design and implement an efficient stream encryption algorithm. We present a wrapper system between the development libraries of a PULP platform enabling the secure execution of a verified RUST-written implementation of ChaCha20 and AES-CTR, targeting a microdrones based video surveillance system. Experimental tests have resulted in an encryption efficiency of ChaCha20 of 2.3 cycles per Byte (cB), placing the resulting implementation at the state-of-the-art, in direct competition with higher-class architectures like Apple M1 (2.0 cB).

Subject Classification

ACM Subject Classification
  • Hardware → Emerging languages and compilers
  • Computer systems organization → Multicore architectures
  • Computer systems organization → Embedded software
  • Software and its engineering → Embedded software
Keywords
  • Parallel Low-Power Embedded Systems
  • Rust
  • RISC-V
  • Stream Cipher

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