Published in: LITES, Volume 5, Issue 1 (2018). Leibniz Transactions on Embedded Systems, Volume 5, Issue 1
Dmitry Burlyaev, Pascal Fradet, and Alain Girault. A Static Analysis for the Minimization of Voters in Fault-Tolerant Circuits. In LITES, Volume 5, Issue 1 (2018). Leibniz Transactions on Embedded Systems, Volume 5, Issue 1, pp. 04:1-04:26, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2018)
@Article{burlyaev_et_al:LITES-v005-i001-a004, author = {Burlyaev, Dmitry and Fradet, Pascal and Girault, Alain}, title = {{A Static Analysis for the Minimization of Voters in Fault-Tolerant Circuits}}, journal = {Leibniz Transactions on Embedded Systems}, pages = {04:1--04:26}, ISSN = {2199-2002}, year = {2018}, volume = {5}, number = {1}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops.dagstuhl.de/entities/document/10.4230/LITES-v005-i001-a004}, doi = {10.4230/LITES-v005-i001-a004}, annote = {Keywords: Digital Circuits, Fault-tolerance, Optimization, Static Analysis, Triple Modular Redundancy} }