3 Search Results for "de la Puente, Juan A."

Document
DOI: 10.4230/OASIcs.AEiC.2026.3
A Certifiable Approach to Multicore Using Ada

Authors: José F. Ruiz

Published in: OASIcs, Volume 143, 30th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2026)

Abstract
The adoption of multicore processors in safety-critical systems, such as avionics, automotive, and rail, introduces significant certification challenges, primarily related to determinism, predictability, and interference management. This paper examines how the Ada programming language, together with its restricted tasking profiles (Ravenscar and Jorvik) and bare-metal run-time libraries, provide a robust and certifiable execution model for multicore systems compliant with guidance such as AC 20-193. By enforcing static task partitioning, fixed-priority scheduling, and a simple synchronization model, the Ada approach systematically limits interference channels and timing variability. This model enables accurate schedulability analysis, simplifies verification activities, and allows the multicore run-time library itself and the application built on top of it to be certified.
Cite as

José F. Ruiz. A Certifiable Approach to Multicore Using Ada. In 30th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2026). Open Access Series in Informatics (OASIcs), Volume 143, pp. 3:1-3:15, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2026)

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@InProceedings{ruiz:OASIcs.AEiC.2026.3,
  author =	{Ruiz, Jos\'{e} F.},
  title =	{{A Certifiable Approach to Multicore Using Ada}},
  booktitle =	{30th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2026)},
  pages =	{3:1--3:15},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-95977-425-3},
  ISSN =	{2190-6807},
  year =	{2026},
  volume =	{143},
  editor =	{Filieri, Antonio and Backeman, Peter},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.AEiC.2026.3},
  URN =		{urn:nbn:de:0030-drops-259217},
  doi =		{10.4230/OASIcs.AEiC.2026.3},
  annote =	{Keywords: multicore, certification, Ada}
}
Document
DOI: 10.4230/OASIcs.WCET.2013.87
Static analysis of WCET in a satellite software subsystem

Authors: Jorge Garrido, Juan Zamorano, and Juan A. de la Puente

Published in: OASIcs, Volume 30, 13th International Workshop on Worst-Case Execution Time Analysis (2013)

Abstract
This paper describes the authors’ experience with static analysis of both WCET and stack usage of a satellite on-board software subsystem. The work is a continuation of a previous case study that used a dynamic WCET analysis tool on an earlier version of the same software system. In particular, the AbsInt aiT tool has been evaluated by analysing both C and Ada code generated by Simulink within the UPMSat-2 project. Some aspects of the aiT tool, specifically those dealing with SPARC register windows, are compared to another static analysis tool, Bound-T. The results of the analysis are discussed, and some conclusions on the use of static WCET analysis tools on the SPARC architecture are commented in the paper.
Cite as

Jorge Garrido, Juan Zamorano, and Juan A. de la Puente. Static analysis of WCET in a satellite software subsystem. In 13th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 30, pp. 87-96, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2013)

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@InProceedings{garrido_et_al:OASIcs.WCET.2013.87,
  author =	{Garrido, Jorge and Zamorano, Juan and de la Puente, Juan A.},
  title =	{{Static analysis of WCET in a satellite software subsystem}},
  booktitle =	{13th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{87--96},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-54-5},
  ISSN =	{2190-6807},
  year =	{2013},
  volume =	{30},
  editor =	{Maiza, Claire},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2013.87},
  URN =		{urn:nbn:de:0030-drops-41259},
  doi =		{10.4230/OASIcs.WCET.2013.87},
  annote =	{Keywords: Real-time systems, embedded systems, timing analysis, WCET calculation, static analysis}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.81
Analysis of WCET in an experimental satellite software development

Authors: Jorge Garrido, Daniel Brosnan, Juan A. de la Puente, Alejandro Alonso, and Juan Zamorano

Published in: OASIcs, Volume 23, 12th International Workshop on Worst-Case Execution Time Analysis (2012)

Abstract
This paper describes a case study in WCET analysis of an on-board spacecraft software system. The attitude control system of UPMSat-2, an experimental micro-satellite which is scheduled to be launched in 2013, is used for an experiment on analysing the worst-case execution time of code automatically generated from a Simulink model. In order to properly test the code, a hardware-in-the-loop configuration with a simulation model of the spacecraft environment has been used as a test bench. The code has been analysed with RapiTime, with some modifications to the original instrumentation routines, in order to take into account the particularities of the test configuration. Results from the experiment are described and commented in the paper.
Cite as

Jorge Garrido, Daniel Brosnan, Juan A. de la Puente, Alejandro Alonso, and Juan Zamorano. Analysis of WCET in an experimental satellite software development. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 81-90, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{garrido_et_al:OASIcs.WCET.2012.81,
  author =	{Garrido, Jorge and Brosnan, Daniel and de la Puente, Juan A. and Alonso, Alejandro and Zamorano, Juan},
  title =	{{Analysis of WCET in an experimental satellite software development}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{81--90},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.81},
  URN =		{urn:nbn:de:0030-drops-35592},
  doi =		{10.4230/OASIcs.WCET.2012.81},
  annote =	{Keywords: Real-time systems, embedded systems, timing analysis, WCET calculation}
}
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