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Algorithmic Building Blocks for Asymmetric Memories

Authors Yan Gu, Yihan Sun, Guy E. Blelloch

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Yan Gu
  • Carnegie Mellon University, Pittsburgh, PA, USA
Yihan Sun
  • Carnegie Mellon University, Pittsburgh, PA, USA
Guy E. Blelloch
  • Carnegie Mellon University, Pittsburgh, PA, USA

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Yan Gu, Yihan Sun, and Guy E. Blelloch. Algorithmic Building Blocks for Asymmetric Memories. In 26th Annual European Symposium on Algorithms (ESA 2018). Leibniz International Proceedings in Informatics (LIPIcs), Volume 112, pp. 44:1-44:15, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2018)
https://doi.org/10.4230/LIPIcs.ESA.2018.44

Abstract

The future of main memory appears to lie in the direction of new non-volatile memory technologies that provide strong capacity-to-performance ratios, but have write operations that are much more expensive than reads in terms of energy, bandwidth, and latency. This asymmetry can have a significant effect on algorithm design, and in many cases it is possible to reduce writes at the cost of more reads. This paper studies which algorithmic techniques are useful in designing practical write-efficient algorithms. We focus on several fundamental algorithmic building blocks including unordered set/map implemented using hash tables, comparison sort, and graph traversal algorithms including breadth-first search and Dijkstra's algorithm. We introduce new algorithms and implementations that can reduce writes, and analyze the performance experimentally using a software simulator. Finally, we summarize interesting lessons and directions in designing write-efficient algorithms that can be valuable to share.

Subject Classification

ACM Subject Classification
  • Theory of computation → Models of computation
  • Theory of computation → Design and analysis of algorithms
Keywords
  • Asymmetric Memory
  • I/O Cost
  • Write-Efficient Algorithms
  • Hash Tables
  • Graph-Traversal Algorithms

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References

  1. Alok Aggarwal and Jeffrey S. Vitter. The Input/Output complexity of sorting and related problems. Communications of the ACM, 31(9), 1988. URL: http://dx.doi.org/10.1145/48529.48535.
  2. Ameen Akel, Adrian M. Caulfield, Todor I. Mollov, Rajech K. Gupta, and Steven Swanson. Onyx: A prototype phase change memory storage array. In USENIX Workshop on Hot Topics in Storage and File Systems (HotStorage), 2011. Google Scholar
  3. Manos Athanassoulis, Bishwaranjan Bhattacharjee, Mustafa Canim, and Kenneth A. Ross. Path processing using solid state storage. In International Workshop on Accelerating Data Management Systems Using Modern Processor and Storage Architectures (ADMS), 2012. Google Scholar
  4. Avraham Ben-Aroya and Sivan Toledo. Competitive analysis of flash-memory algorithms. In European Symposium on Algorithms (ESA), 2006. Google Scholar
  5. Naama Ben-David, Guy E. Blelloch, Jeremy T. Fineman, Phillip B. Gibbons, Yan Gu, Charles McGuffey, and Julian Shun. Parallel algorithms for asymmetric read-write costs. In ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), 2016. Google Scholar
  6. Naama Ben-David, Guy E Blelloch, Jeremy T Fineman, Phillip B Gibbons, Yan Gu, Charles McGuffey, and Julian Shun. Implicit decomposition for write-efficient connectivity algorithms. In Proc. IEEE International Parallel &Distributed Processing Symposium (IPDPS), 2018. Google Scholar
  7. Guy E. Blelloch, Jeremy T. Fineman, Phillip B. Gibbons, Yan Gu, and Julian Shun. Sorting with asymmetric read and write costs. In ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), 2015. Google Scholar
  8. Guy E. Blelloch, Jeremy T. Fineman, Phillip B. Gibbons, Yan Gu, and Julian Shun. Efficient algorithms with asymmetric read and write costs. In European Symposium on Algorithms (ESA), pages 14:1-14:18, 2016. Google Scholar
  9. Guy E Blelloch, Phillip B Gibbons, Yan Gu, Charles McGuffey, and Julian Shun. The parallel persistent memory model. In ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), 2018. Google Scholar
  10. Guy E Blelloch, Yan Gu, Julian Shun, and Yihan Sun. Parallel write-efficient algorithms and data structures for computational geometry. In ACM Symposium on Parallelism in Algorithms and Architectures (SPAA). ACM, 2018. Google Scholar
  11. Erin Carson, James Demmel, Laura Grigori, Nicholas Knight, Penporn Koanantakool, Oded Schwartz, and Harsha Vardhan Simhadri. Write-avoiding algorithms. In IEEE International Parallel and Distributed Processing Symposium (IPDPS), pages 648-658, 2016. Google Scholar
  12. Shimin Chen, Phillip B. Gibbons, and Suman Nath. Rethinking database algorithms for phase change memory. In Conference on Innovative Data Systems Research (CIDR), 2011. Google Scholar
  13. Sangyeun Cho and Hyunjin Lee. Flip-N-Write: A simple deterministic technique to improve PRAM write performance, energy and endurance. In IEEE/ACM International Symposium on Microarchitecture (MICRO), 2009. Google Scholar
  14. Edsger W. Dijkstra. A note on two problems in connexion with graphs. Numerische mathematik, 1(1), 1959. Google Scholar
  15. Xiangyu Dong, Norman P. Jouupi, and Yuan Xie. PCRAMsim: System-level performance, energy, and area modeling for phase-change RAM. In ACM International Conference on Computer-Aided Design (ICCAD), 2009. Google Scholar
  16. Xiangyu Dong, Xiaoxia Wu, Guangyu Sun, Yuan Xie, Hai H. Li, and Yiran Chen. Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement. In ACM Design Automation Conference (DAC), 2008. Google Scholar
  17. David Eppstein, Michael T. Goodrich, Michael Mitzenmacher, and Pawel Pszona. Wear minimization for cuckoo hashing: How not to throw a lot of eggs into one basket. In ACM International Symposium on Experimental Algorithms (SEA), 2014. Google Scholar
  18. Eran Gal and Sivan Toledo. Algorithms and data structures for flash memories. ACM Computing Surveys, 37(2), 2005. Google Scholar
  19. Yan Gu. Write-Efficient Algorithms (draft). PhD Thesis, 2018. Google Scholar
  20. Yan Gu, Yihan Sun, and Guy E. Blelloch. Algorithmic building blocks for asymmetric memories (full version). In arXiv preprint:1806.10370, 2018. Google Scholar
  21. HP, SanDisk partner on memristor, ReRAM technology. http://www.bit-tech.net/news/ hardware 10 hp-sandisk-reram-memristor, 2015. Google Scholar
  22. Jingtong Hu, Qingfeng Zhuge, Chun Jason Xue, Wei-Che Tseng, Shouzhen Gu, and Edwin Sha. Scheduling to optimize cache utilization for non-volatile main memories. IEEE Transactions on Computers, 63(8), 2014. Google Scholar
  23. www.slideshare.net/IBMZRL/theseus-pss-nvmw2014, 2014. Google Scholar
  24. Intel and Micron produce breakthrough memory technology. http://newsroom.intel.com/ community/intel_newsroom/blog 07 intel-and-micron-produce-breakthrough-memory-technology, 2015. Google Scholar
  25. Riko Jacob and Nodari Sitchinava. Lower bounds in the asymmetric external memory model. In ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), pages 247-254, 2017. Google Scholar
  26. Hyojun Kim, Sangeetha Seshadri, Clement L. Dickey, and Lawrence Chu. Evaluating phase change memory for enterprise storage systems: A study of caching and tiering approaches. In USENIX Conference on File and Storage Technologies (FAST), 2014. Google Scholar
  27. Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger. Architecting phase change memory as a scalable DRAM alternative. In ACM International Symposium on Computer Architecture (ISCA), 2009. Google Scholar
  28. Charles Lefurgy, Karthick Rajamani, Freeman Rawson, Wes Felter, Michael Kistler, and Tom W Keller. Energy management for commercial servers. Computer, 36(12):39-48, 2003. Google Scholar
  29. Jure Leskovec and Andrej Krevl. SNAP Datasets: Stanford large network dataset collection, 2014. Google Scholar
  30. Jacob Leverich and Christos Kozyrakis. Reconciling high server utilization and sub-millisecond quality-of-service. In European Conference on Computer Systems, page 4. ACM, 2014. Google Scholar
  31. Jasmina Malicevic, Subramanya Dulloor, Narayanan Sundaram, Nadathur Satish, Jeff Jackson, and Willy Zwaenepoel. Exploiting NVM in large-scale graph analytics. In Workshop on Interactions of NVM/FLASH with Operating Systems and Workloads. ACM, 2015. Google Scholar
  32. Krishna T Malladi, Ian Shaeffer, Liji Gopalakrishnan, David Lo, Benjamin C Lee, and Mark Horowitz. Rethinking DRAM power modes for energy proportionality. In IEEE/ACM International Symposium on Microarchitecture, pages 131-142, 2012. Google Scholar
  33. Jagan S. Meena, Simon M. Sze, Umesh Chand, and Tseung-Yuan Tseng. Overview of emerging nonvolatile memory technologies. Nanoscale Research Letters, 9, 2014. Google Scholar
  34. MARSSx86. http://marss86.org. Google Scholar
  35. Hyoungmin Park and Kyuseok Shim. FAST: Flash-aware external sorting for mobile database systems. Journal of Systems and Software, 82(8), 2009. URL: http://dx.doi.org/10.1016/j.jss.2009.02.028.
  36. PTLsim. http://www.ptlsim.org. Google Scholar
  37. Moinuddin K. Qureshi, Sudhanva Gurumurthi, and Bipin Rajendran. Phase Change Memory: From Devices to Systems. Morgan &Claypool, 2011. Google Scholar
  38. Daniel Sanchez and Christos Kozyrakis. Zsim: fast and accurate microarchitectural simulation of thousand-core systems. In ACM SIGARCH Computer Architecture News, volume 41, pages 475-486. ACM, 2013. Google Scholar
  39. Stratis D. Viglas. Adapting the B^+-tree for asymmetric I/O. In East European Conference on Advances in Databases and Information Systems (ADBIS), 2012. Google Scholar
  40. Stratis D. Viglas. Write-limited sorts and joins for persistent memory. VLDB Endowment, 7(5), 2014. Google Scholar
  41. Cong Xu, Xiangyu Dong, Norman P. Jouppi, and Yuan Xie. Design implications of memristor-based RRAM cross-point structures. In IEEE Design, Automation and Test in Europe (DATE), 2011. Google Scholar
  42. Byung-Do Yang, Jae-Eun Lee, Jang-Su Kim, Junghyun Cho, Seung-Yun Lee, and Byoung-Gon Yu. A low power phase-change random access memory using a data-comparison write scheme. In IEEE International Symposium on Circuits and Systems (ISCAS), 2007. Google Scholar
  43. Yole Developpement. Emerging non-volatile memory technologies, 2013. Google Scholar
  44. Ping Zhou, Bo Zhao, Jun Yang, and Youtao Zhang. A durable and energy efficient main memory using phase change memory technology. In ACM International Symposium on Computer Architecture (ISCA), 2009. Google Scholar
  45. Omer Zilberberg, Shlomo Weiss, and Sivan Toledo. Phase-change memory: An architectural perspective. ACM Computing Surveys, 45(3), 2013. Google Scholar
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