6 Search Results for "Castrillon, Jeronimo"

Document
DOI: 10.4230/DagRep.15.2.126
Tradeoffs in Reactive Systems Design (Dagstuhl Seminar 25091)

Authors: Jerónimo Castrillón-Mazo, Chadlia Jerad, Edward A. Lee, Claire Pagetti, and Shaokai Jerry Lin

Published in: Dagstuhl Reports, Volume 15, Issue 2 (2025)

Abstract
Reactive systems - software systems that continuously interact with their physical or digital environment - are central to safety-critical domains such as autonomous vehicles, industrial automation, and medical devices. These systems face inherent design tensions: the need to be predictable yet adaptable, timely yet accurate, consistent yet available, and secure yet accessible. Addressing one requirement often undermines another, revealing tradeoffs that are not merely engineering challenges but fundamental limits. This seminar aimed to confront these tradeoffs directly, drawing on insights from real-time systems, distributed computing, formal methods, machine learning, and security. By exploring case studies, formal frameworks, and practical tools, we made progress in the understanding of how to make design decisions when no single solution satisfies all competing goals. Interactive sessions and demos gave participants a tangible sense of the costs and compromises involved. With all this, we achieved the seminar’s goal, namely, to cultivate a shared understanding of how to navigate the complex design space of reactive systems and chart paths toward more robust and principled solutions.
Cite as

Jerónimo Castrillón-Mazo, Chadlia Jerad, Edward A. Lee, Claire Pagetti, and Shaokai Jerry Lin. Tradeoffs in Reactive Systems Design (Dagstuhl Seminar 25091). In Dagstuhl Reports, Volume 15, Issue 2, pp. 126-157, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2025)

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@Article{castrillonmazo_et_al:DagRep.15.2.126,
  author =	{Castrill\'{o}n-Mazo, Jer\'{o}nimo and Jerad, Chadlia and Lee, Edward A. and Pagetti, Claire and Lin, Shaokai Jerry},
  title =	{{Tradeoffs in Reactive Systems Design (Dagstuhl Seminar 25091)}},
  pages =	{126--157},
  journal =	{Dagstuhl Reports},
  ISSN =	{2192-5283},
  year =	{2025},
  volume =	{15},
  number =	{2},
  editor =	{Castrill\'{o}n-Mazo, Jer\'{o}nimo and Jerad, Chadlia and Lee, Edward A. and Pagetti, Claire and Lin, Shaokai Jerry},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DagRep.15.2.126},
  URN =		{urn:nbn:de:0030-drops-230878},
  doi =		{10.4230/DagRep.15.2.126},
  annote =	{Keywords: reactive systems, cyber-physical systems, design tradeoffs, real-time systems, distributed computing, predictability, adaptability, timeliness, accuracy, consistency, availability, security, accessibility, machine learning, formal methods, system design, embedded systems, safety-critical systems, tool support, programming models, runtime verification}
}
Document
DOI: 10.4230/OASIcs.PARMA-DITAM.2025.2
Custom Floating-Point Computations for the Optimization of ODE Solvers on FPGA

Authors: Serena Curzel and Marco Gribaudo

Published in: OASIcs, Volume 127, 16th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 14th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2025)

Abstract
Mean Field Analysis and Markovian Agents are powerful techniques for modeling complex systems of distributed interacting objects, for which efficient analytical and numerical solution algorithms can be implemented through linear systems of ordinary differential equations (ODEs). Solving such ODE systems on Field Programmable Gate Arrays (FPGAs) is a promising alternative to traditional CPU- and GPU-based approaches, especially in terms of energy consumption; however, the floating-point computations required are generally thought to be slow and inefficient when implemented on FPGA. In this paper, we demonstrate the use of High-Level Synthesis with automated customization of low-precision floating-point calculations, obtaining hardware accelerators for ODE solvers with improved quality of results and minimal output error. The proposed methodology does not require any manual rewriting of the solver code, but it remains prohibitively slow to evaluate any possible floating-point configuration through logic synthesis; in the future, we will thus implement automated design space exploration methods able to suggest promising configurations under user-defined accuracy and performance constraints.
Cite as

Serena Curzel and Marco Gribaudo. Custom Floating-Point Computations for the Optimization of ODE Solvers on FPGA. In 16th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 14th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2025). Open Access Series in Informatics (OASIcs), Volume 127, pp. 2:1-2:13, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2025)

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@InProceedings{curzel_et_al:OASIcs.PARMA-DITAM.2025.2,
  author =	{Curzel, Serena and Gribaudo, Marco},
  title =	{{Custom Floating-Point Computations for the Optimization of ODE Solvers on FPGA}},
  booktitle =	{16th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 14th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2025)},
  pages =	{2:1--2:13},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-95977-363-8},
  ISSN =	{2190-6807},
  year =	{2025},
  volume =	{127},
  editor =	{Cattaneo, Daniele and Fazio, Maria and Kosmidis, Leonidas and Morabito, Gabriele},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.PARMA-DITAM.2025.2},
  URN =		{urn:nbn:de:0030-drops-229064},
  doi =		{10.4230/OASIcs.PARMA-DITAM.2025.2},
  annote =	{Keywords: Differential Equations, High-Level Synthesis, FPGA, floating-point}
}
Document
DOI: 10.4230/LIPIcs.ECOOP.2023.33
ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs

Authors: Felix Suchert, Lisza Zeidler, Jeronimo Castrillon, and Sebastian Ertel

Published in: LIPIcs, Volume 263, 37th European Conference on Object-Oriented Programming (ECOOP 2023)

Abstract
SAT/SMT-solvers and model checkers automate formal verification of sequential programs. Formal reasoning about scalable concurrent programs is still manual and requires expert knowledge. But scalability is a fundamental requirement of current and future programs. Sequential imperative programs compose statements, function/method calls and control flow constructs. Concurrent programming models provide constructs for concurrent composition. Concurrency abstractions such as threads and synchronization primitives such as locks compose the individual parts of a concurrent program that are meant to execute in parallel. We propose to rather compose the individual parts again using sequential composition and compile this sequential composition into a concurrent one. The developer can use existing tools to formally verify the sequential program while the translated concurrent program provides the dearly requested scalability. Following this insight, we present ConDRust, a new programming model and compiler for Rust programs. The ConDRust compiler translates sequential composition into a concurrent composition based on threads and message-passing channels. During compilation, the compiler preserves the semantics of the sequential program along with much desired properties such as determinism. Our evaluation shows that our ConDRust compiler generates concurrent deterministic code that can outperform even non-deterministic programs by up to a factor of three for irregular algorithms that are particularly hard to parallelize.
Cite as

Felix Suchert, Lisza Zeidler, Jeronimo Castrillon, and Sebastian Ertel. ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs. In 37th European Conference on Object-Oriented Programming (ECOOP 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 263, pp. 33:1-33:39, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)

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@InProceedings{suchert_et_al:LIPIcs.ECOOP.2023.33,
  author =	{Suchert, Felix and Zeidler, Lisza and Castrillon, Jeronimo and Ertel, Sebastian},
  title =	{{ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs}},
  booktitle =	{37th European Conference on Object-Oriented Programming (ECOOP 2023)},
  pages =	{33:1--33:39},
  series =	{Leibniz International Proceedings in Informatics (LIPIcs)},
  ISBN =	{978-3-95977-281-5},
  ISSN =	{1868-8969},
  year =	{2023},
  volume =	{263},
  editor =	{Ali, Karim and Salvaneschi, Guido},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.ECOOP.2023.33},
  URN =		{urn:nbn:de:0030-drops-182263},
  doi =		{10.4230/LIPIcs.ECOOP.2023.33},
  annote =	{Keywords: concurrent programming, verification, scalability}
}
Document
Artifact
DOI: 10.4230/DARTS.9.2.16
ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs (Artifact)

Authors: Felix Suchert, Lisza Zeidler, Jeronimo Castrillon, and Sebastian Ertel

Published in: DARTS, Volume 9, Issue 2, Special Issue of the 37th European Conference on Object-Oriented Programming (ECOOP 2023)

Abstract
SAT/SMT-solvers and model checkers automate formal verification of sequential programs. Formal reasoning about scalable concurrent programs is still manual and requires expert knowledge. But scalability is a fundamental requirement of current and future programs. Sequential imperative programs compose statements, function/method calls and control flow constructs. Concurrent programming models provide constructs for concurrent composition. Concurrency abstractions such as threads and synchronization primitives such as locks compose the individual parts of a concurrent program that are meant to execute in parallel. We propose to rather compose the individual parts again using sequential composition and compile this sequential composition into a concurrent one. The developer can use existing tools to formally verify the sequential program while the translated concurrent program provides the dearly requested scalability. Following this insight, we present ConDRust, a new programming model and compiler for Rust programs. The ConDRust compiler translates sequential composition into a concurrent composition based on threads and message-passing channels. During compilation, the compiler preserves the semantics of the sequential program along with much desired properties such as determinism. Our evaluation shows that our ConDRust compiler generates concurrent deterministic code that can outperform even non-deterministic programs by up to a factor of three for irregular algorithms that are particularly hard to parallelize.
Cite as

Felix Suchert, Lisza Zeidler, Jeronimo Castrillon, and Sebastian Ertel. ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs (Artifact). In Special Issue of the 37th European Conference on Object-Oriented Programming (ECOOP 2023). Dagstuhl Artifacts Series (DARTS), Volume 9, Issue 2, pp. 16:1-16:3, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)

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@Article{suchert_et_al:DARTS.9.2.16,
  author =	{Suchert, Felix and Zeidler, Lisza and Castrillon, Jeronimo and Ertel, Sebastian},
  title =	{{ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs (Artifact)}},
  pages =	{16:1--16:3},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2023},
  volume =	{9},
  number =	{2},
  editor =	{Suchert, Felix and Zeidler, Lisza and Castrillon, Jeronimo and Ertel, Sebastian},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.9.2.16},
  URN =		{urn:nbn:de:0030-drops-182562},
  doi =		{10.4230/DARTS.9.2.16},
  annote =	{Keywords: concurrent programming, verification, scalability}
}
Document
DOI: 10.4230/OASIcs.PARMA-DITAM.2021.1
Towards Adaptive Multi-Alternative Process Network

Authors: Hasna Bouraoui, Chadlia Jerad, and Jeronimo Castrillon

Published in: OASIcs, Volume 88, 12th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and 10th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2021)

Abstract
With the increase of voice-controlled systems, speech based recognition applications are gaining more attention. Such applications need to adapt to hardware platforms to offer the required performance. Given the streaming nature of these applications, dataflow models are a common choice for model-based design and execution on parallel embedded platforms. However, most of today’s models are built on top of classical static dataflow with adaptivity extensions to express data parallelism. In this paper, we define and describe an approach for algorithmic adaptivity to express richer sets of variants and trade-offs. For this, we introduce multi-Alternative Process Network (mAPN), a high-level abstract representation where several process networks of the same application coexist. We describe an algorithm for automatic generation of all possible alternatives. The mAPN is enriched with meta-data serving to endow the alternatives with annotations in terms of a specific metric, helping to extract the most suitable alternative depending on the available computational resources and application/user constraints. We motivate the approach by the automatic subtitling application (ASA) as use case and run the experiments on an mAPN sample consisting of 12 randomly selected possible variants.
Cite as

Hasna Bouraoui, Chadlia Jerad, and Jeronimo Castrillon. Towards Adaptive Multi-Alternative Process Network. In 12th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and 10th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2021). Open Access Series in Informatics (OASIcs), Volume 88, pp. 1:1-1:11, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2021)

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@InProceedings{bouraoui_et_al:OASIcs.PARMA-DITAM.2021.1,
  author =	{Bouraoui, Hasna and Jerad, Chadlia and Castrillon, Jeronimo},
  title =	{{Towards Adaptive Multi-Alternative Process Network}},
  booktitle =	{12th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and 10th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2021)},
  pages =	{1:1--1:11},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-95977-181-8},
  ISSN =	{2190-6807},
  year =	{2021},
  volume =	{88},
  editor =	{Bispo, Jo\~{a}o and Cherubin, Stefano and Flich, Jos\'{e}},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.PARMA-DITAM.2021.1},
  URN =		{urn:nbn:de:0030-drops-136378},
  doi =		{10.4230/OASIcs.PARMA-DITAM.2021.1},
  annote =	{Keywords: High level process network, algorithmic adaptivity, automatic subtitling application}
}
Document
DOI: 10.4230/DagRep.7.2.1
Wildly Heterogeneous Post-CMOS Technologies Meet Software (Dagstuhl Seminar 17061)

Authors: Jerónimo Castrillón-Mazo, Tei-Wei Kuo, Heike E. Riel, and Matthias Lieber

Published in: Dagstuhl Reports, Volume 7, Issue 2 (2017)

Abstract
The end of exponential scaling in conventional CMOS technologies has been forecasted for many years by now. While advances in fabrication made it possible to reach limits beyond those predicted, the so anticipated end seems to be imminent today. The main goal of the seminar 17061 "Wildly Heterogeneous Post-CMOS Technologies Meet Software" was to discuss bridges between material research, hardware components and, ultimately, software for information processing systems. By bringing together experts from the individual fields and also researchers working interdisciplinarily across fields, the seminar helped to foster a mutual understanding about the challenges of advancing computing beyond current CMOS technology and to create long-term visions about a future hardware/software stack.
Cite as

Jerónimo Castrillón-Mazo, Tei-Wei Kuo, Heike E. Riel, and Matthias Lieber. Wildly Heterogeneous Post-CMOS Technologies Meet Software (Dagstuhl Seminar 17061). In Dagstuhl Reports, Volume 7, Issue 2, pp. 1-22, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2017)

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@Article{castrillonmazo_et_al:DagRep.7.2.1,
  author =	{Castrill\'{o}n-Mazo, Jer\'{o}nimo and Kuo, Tei-Wei and Riel, Heike E. and Lieber, Matthias},
  title =	{{Wildly Heterogeneous Post-CMOS Technologies Meet Software (Dagstuhl Seminar 17061)}},
  pages =	{1--22},
  journal =	{Dagstuhl Reports},
  ISSN =	{2192-5283},
  year =	{2017},
  volume =	{7},
  number =	{2},
  editor =	{Castrill\'{o}n-Mazo, Jer\'{o}nimo and Kuo, Tei-Wei and Riel, Heike E. and Lieber, Matthias},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DagRep.7.2.1},
  URN =		{urn:nbn:de:0030-drops-73499},
  doi =		{10.4230/DagRep.7.2.1},
  annote =	{Keywords: 3D integration, compilers, emerging post-CMOS circuit materials and technologies, hardware/software co-design, heterogeneous hardware, nanoelectronics}
}
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