VOSYSmonitor, a Low Latency Monitor Layer for Mixed-Criticality Systems on ARMv8-A

Authors Pierre Lucas, Kevin Chappuis, Michele Paolino, Nicolas Dagieu, Daniel Raho



PDF
Thumbnail PDF

File

LIPIcs.ECRTS.2017.6.pdf
  • Filesize: 0.74 MB
  • 18 pages

Document Identifiers

Author Details

Pierre Lucas
Kevin Chappuis
Michele Paolino
Nicolas Dagieu
Daniel Raho

Cite AsGet BibTex

Pierre Lucas, Kevin Chappuis, Michele Paolino, Nicolas Dagieu, and Daniel Raho. VOSYSmonitor, a Low Latency Monitor Layer for Mixed-Criticality Systems on ARMv8-A. In 29th Euromicro Conference on Real-Time Systems (ECRTS 2017). Leibniz International Proceedings in Informatics (LIPIcs), Volume 76, pp. 6:1-6:18, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2017)
https://doi.org/10.4230/LIPIcs.ECRTS.2017.6

Abstract

With the emergence of multicore embedded System on Chip (SoC), the integration of several applications with different levels of criticality on the same platform is becoming increasingly popular. These platforms, known as mixed-criticality systems, need to meet numerous requirements such as real-time constraints, Operating System (OS) scheduling, memory and OSes isolation. To construct mixed-criticality systems, various solutions, based on virtualization extensions, have been presented where OSes are contained in a Virtual Machine (VM) through the use of a hypervisor. However, such implementations usually lack hardware features to ensure a full isolation of other bus masters (e.g., Direct Memory Access (DMA) peripherals, Graphics Processing Unit (GPU)) between OSes. Furthermore on multicore implementation, one core is usually dedicated to one OS, causing CPU underutilization. To address these issues, this paper presents VOSYSmonitor, a multi-core software layer, which allows the co-execution of a safety-critical Real-Time Operating System (RTOS) and a non-critical General Purpose Operating System (GPOS) on the same hardware ARMv8-A platform. VOSYSmonitor main differentiation factors with the known solutions is the possibility for a processor to switch between secure and non-secure code execution at runtime. The partitioning is ensured by the ARM TrustZone technology, thus allowing to preserve the usage of virtualization features for the GPOS. VOSYSmonitor architecture will be detailed in this paper, while benchmarking its performance versus other known solutions.
Keywords
  • VOSYSmonitor
  • ARM TrustZone
  • Mixed Criticality
  • Real Time

Metrics

  • Access Statistics
  • Total Accesses (updated on a weekly basis)
    0
    PDF Downloads

References

  1. International Standard ISO 26262-4. Road vehicles - functional safety - part 4: Product development at the system level. Standard, International Organization for Standardization, November 2011. Google Scholar
  2. International Standard ISO 26262-6. Road vehicles - functional safety - part 6: Product development at the software level. Standard, International Organization for Standardization, November 2011. Google Scholar
  3. International Standard ISO 26262-8. Road vehicles - functional safety - part 8: Supporting processes. Standard, International Organization for Standardization, November 2011. Google Scholar
  4. Hopkins Andrew. The functional safety imperative in automotive design. Standard, ARM Ltd, September 2016. Google Scholar
  5. Avanzini Arianna. Integrating Linux and the real-time ERIKA OS through the Xen hypervisor. Industrial Embedded Systems (SIES), 2015. URL: http://dx.doi.org/10.1109/SIES.2015.7185063.
  6. Sanjoy Baruah, Haohan Li, and Leen Stougie. Towards the design of certifiable mixed-criticality systems. In 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium, pages 13-22. IEEE, 2010. Google Scholar
  7. Alan Burns and Rob Davis. Mixed criticality systems-a review. Department of Computer Science, University of York, Tech. Rep, 2013. Google Scholar
  8. Helmut Fennel, Stefan Bunzel, Harald Heinecke, Jürgen Bielefeld, Simon Fürst, Klaus-Peter Schnelle, Walter Grote, Nico Maldener, Thomas Weber, Florian Wohlgemuth, et al. Achievements and exploitation of the AUTOSAR development partnership. Convergence, 2006:10, 2006. Google Scholar
  9. Linux Foundation. The Xen Project, the powerful open source industry standard for virtualization. URL: https://www.xenproject.org/.
  10. Jason Geffner. VENOM Virtualized Environment Neglected Operations Manipulation. URL: http://venom.crowdstrike.com/.
  11. Richard Grisenthwaite. ARMv8 Technology Preview. In IEEE Conference, 2011. Google Scholar
  12. Linaro. Op-tee. URL: https://wiki.linaro.org/WorkingGroups/Security/OP-TEE.
  13. ARM Ltd. ARM Compiler 6. URL: https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-6.
  14. ARM Ltd. ARM Compiler Safety Package. URL: https://developer.arm.com/products/software-development-tools/compilers/arm-compiler/safety.
  15. ARM Ltd. Programmable Interrupt Controllers: A New Architecture. URL: https://www.community.arm.com/processors/b/blog/posts/programmable-interrupt-controllers-a-new-architecture.
  16. ARM Ltd. TrustZone. URL: https://developer.arm.com/technologies/trustzone.
  17. ARM Ltd. Power State Coordination Interface, August 2012. Google Scholar
  18. ARM Ltd. Juno ARM Development Platform SoC, r1p0 edition, June 2013. Google Scholar
  19. ARM Ltd. SMC Calling Convention, June 2013. Google Scholar
  20. ARM Ltd. ARM Cortex - A Series, March 2015. Programmer’s Guide for ARMv8-A. Google Scholar
  21. ARM Ltd. ARM Architecture Reference Manual, January 2016. ARMv8, for ARMv8-A architecture profile. Google Scholar
  22. ARM Ltd. Github repository. https://github.com/ARM-software/arm-trusted-firmware, 2016.
  23. HighIntegritySystems Ltd. SAFERTOS Safety Certified RTOS. URL: https://www.highintegritysystems.com/safertos/.
  24. Miguel Masmano, Ismael Ripoll, Alfons Crespo, and J. Metge. Xtratum: a hypervisor for safety critical embedded systems. In 11th Real-Time Linux Workshop, pages 263-272. Citeseer, 2009. Google Scholar
  25. Malcolm S. Mollison, Jeremy P. Erickson, James H. Anderson, Sanjoy K. Baruah, and John A. Scoredos. Mixed-criticality real-time scheduling for multicore systems. In Computer and Information Technology (CIT), 2010 IEEE 10th International Conference on, pages 1864-1871. IEEE, 2010. Google Scholar
  26. Boris Motruk, Jonas Diemer, Rainer Buchty, Rolf Ernst, and Mladen Berekovic. Idamc: A many-core platform with run-time monitoring for mixed-criticality. In High-Assurance Systems Engineering (HASE), 2012 IEEE 14th International Symposium on, pages 24-31. IEEE, 2012. Google Scholar
  27. NVIDIA. NVIDIA Tegra X1 Mobile Processor Technical Reference Manual, November 2015. Google Scholar
  28. Sandro Pinto, Jorge Pereira, Tiago Gomes, Mongkol Ekpanyapong, and Adriano Tavares. Towards a TrustZone-assisted Hypervisor for Real Time Embedded Systems. IEEE Computer Architecture Letters, 2016. Google Scholar
  29. Renesas. R-Car Series, 3rd Generation User’s Manual: Hardware, February 2016. Google Scholar
  30. Russell Rusty. Ubuntu Manpage: hackbench - scheduler benchmark/stress test. URL: http://manpages.ubuntu.com/manpages/precise/man8/hackbench.8.html.
  31. Udo Steinberg and Bernhard Kauer. NOVA: a microhypervisor-based secure virtualization architecture. In Proceedings of the 5th European conference on Computer systems, pages 209-222. ACM, 2010. Google Scholar
  32. Michael Zimmer, David Broman, Chris Shaver, and Edward A. Lee. PFlexPRET: A processor platform for mixed-criticality systems. In 2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS), pages 101-110. IEEE, 2014. Google Scholar
Questions / Remarks / Feedback
X

Feedback for Dagstuhl Publishing


Thanks for your feedback!

Feedback submitted

Could not send message

Please try again later or send an E-mail