LITES, Volume 1, Issue 1

LITES, Volume 1, Issue 1

I would like to welcome all readers to the first issue of this new not-for-profit open access journal: the Leibniz Transactions on Embedded Systems (LITES). Unless you have come across this journal by accident then you will already understand the key role that embedded systems have in modern life. One can hardly think of a single human activity that is not underpinned by such systems; transport, entertainment, supply lines for supermarkets, health care and drug production, energy production and transmission, robotic manufacturing, control systems and communication media of all kinds are now dependent on the fusion of embedded hardware and software. For researchers in this domain this provides great opportunities but also responsibilities. We need to make sure that society can justifiable rely on technology that is increasing beyond the understanding of most ordinary people. Computer-based technologies have been described as modern magic; it follows that we are therefore magicians. But the spells we cast must be based on sound principles, solid theory and demonstrable performance.One of the influences that embedded and other IT technology has had in the last decade is in publishing itself. Online services are now the norm. And early and open access to publicly funded research is now rightly demanded by Government bodies and related funding councils. This new journal has been created to meet this challenge. All papers are open access, with copyright being retained by the authors. Moreover, only a small fee is charged to authors due to low operational overheads and the support of Google and the Klaus Tschira Stiftung. But the lack of a physical page limit in an online-only journal does not mean that quality is undermined. All papers are thoroughly reviewed, with only the best work, in terms of originality and rigour, being accepted. Our aim is to evolve an excellent and effective venue for publish scholarly articles. To help achieve this aim LITES benefits greatly from having the name and reputation of Schloss Dagstuhl behind it.The volume of research material produced world-wide relating to embedded systems has lead to the spawning of many conferences and workshops, special issues and focused publications. In LITES we intend to cater for the broadest collection of relevant topics. We currently have subject editors to cover: the design, implementation, verification, and testing of embedded hardware and software systems; the theoretical foundations; single-core, multi-processor and networked architectures and their energy consumption and predictability properties; reliability and fault tolerance; security properties; applications in the avionics, automotive, telecommunication, medical and production domains; cyber-physical systems; high performance and real-time embedded systems; and hybrid systems. This is an impressive list, but it is not exhaustive. New areas will emerge and new editors will be appointed.LITES obtains its governance from EDAA (European Design and Automation Association) and EMSIG (Embedded Systems Special Interest Group) as a joint endeavour with Schloss Dagstuhl. EDAA/EMSIG appoint the Editor-in-Chief (EiC) and the subject area editors. The terms for editors is four years, renewable once. All editorial work is done voluntarily.The first few issues of the journal will contain standard papers that have been through the review process. Later, comments on previously published papers will be allowed and commentaries included that will help the reader trace forward the influence of each paper. Comments will be reviewed; commentaries will just need to be passed by the EiC. I hope that as a reader you will find the papers in this journal of interest and often inspirational. As a researcher I hope you will consider it as a worthy place to entrust your work. All the editorial team will work towards building up the reputation of the journal. I hope the community at large will be part of that journey.I am proud to be the founding EiC of this journal, but I promise not to include editorials in future issues. The papers are quite capable of introducing themselves.Alan Burns

In multitasking real-time systems, the choice of scheduling algorithm is an important factor to ensure that response time requirements are met while maximising limited system resources. Two popular scheduling algorithms include fixed priority (FP) and earliest deadline first (EDF). While they have been studied in great detail before, they have not been compared when taking into account cache related pre-emption delays (CRPD). Memory and cache are split into a number of blocks containing instructions and data. During a pre-emption, cache blocks from the pre-empting task can evict those of the pre-empted task. When the pre-empted task is resumed, if it then has to re-load the evicted blocks, CRPD are introduced which then affect the schedulability of the task. In this paper we compare FP and EDF scheduling algorithms in the presence of CRPD using the state-of-the-art CRPD analysis. We find that when CRPD is accounted for, the performance gains offered by EDF over FP, while still notable, are diminished. Furthermore, we find that under scenarios that cause relatively high CRPD, task layout optimisation techniques can be applied to allow FP to schedule tasksets at a similar processor utilisation to EDF. Thus making the choice of the task layout in memory as important as the choice of scheduling algorithm. This is very relevant for industry, as it is much cheaper and simpler to adjust the task layout through the linker than it is to switch the scheduling algorithm.

SystemC/TLM models, which are C++ programs, allow the simulation of embedded software before hardware low-level descriptions are available and are used as golden models for hardware verification. The verification of the SystemC/TLM models is an important issue since an error in the model can mislead the system designers or reveal an error in the specifications. An open-source simulator for SystemC/TLM is provided but there are no tools for formal verification.In order to apply model checking to a SystemC/TLM model, a semantics for standard C++ code and for specific SystemC/TLM features must be provided. The usual approach relies on the translation of the SystemC/TLM code into a formal language for which a model checker is available.We propose another approach that suppresses the error-prone translation effort. Given a SystemC/TLM program, the transitions are obtained by executing the original code using g++ and an extended SystemC library, and we ask the user to provide additional functions to store the current model state. These additional functions generally represent less than 20% of the size of the original model, and allow it to apply all CADP verification tools to the SystemC/TLM model itself.

We investigate the suitability of caches with randomized placement and replacement in the context of hard real-time systems. Such caches have been claimed to drastically reduce the amount of information required by static worst-case execution time (WCET) analysis, and to be an enabler for measurement-based probabilistic timing analysis. We refute these claims and conclude that with prevailing static and measurement-based analysis techniques caches with deterministic placement and least-recently-used replacement are preferable over randomized ones.