OASIcs, Volume 6

7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)



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Event

WCET 2007, July 3, 2007, Pisa, Italy

Editor

Christine Rochange

Publication Details

  • published at: 2007-11-13
  • Publisher: Schloss Dagstuhl – Leibniz-Zentrum für Informatik
  • ISBN: 978-3-939897-05-7
  • DBLP: db/conf/wcet/wcet2007

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Document
Complete Volume
OASIcs, Volume 6, WCET'07, Complete Volume

Authors: Christine Rochange


Abstract
OASIcs, Volume 6, WCET'07, Complete Volume

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7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)


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@Proceedings{rochange:OASIcs.WCET.2007,
  title =	{{OASIcs, Volume 6, WCET'07, Complete Volume}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007},
  URN =		{urn:nbn:de:0030-drops-35684},
  doi =		{10.4230/OASIcs.WCET.2007},
  annote =	{Keywords: Performance of Systems, Software/Program Verification}
}
Document
Front Matter
WCET 2007 Abstracts Collection -- 7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis

Authors: Christine Rochange


Abstract
The workshop on Worst-Case Execution Time Analysis is a satellite event to the annual Euromicro Conference on Real-Time Systems. It brings together people that are interested in all aspects of timing analysis for real-time systems. In the 2007 edition, 13 papers were presented, organized into four sessions: methods for WCET computation, low-level analysis, system-level analysis and flow-analysis. The workshop was also the opportunity to report from the 2006 WCET tool challenge.

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7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. i-x, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{rochange:OASIcs.WCET.2007.1238,
  author =	{Rochange, Christine},
  title =	{{WCET 2007 Abstracts Collection -- 7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{i--x},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1238},
  URN =		{urn:nbn:de:0030-drops-12387},
  doi =		{10.4230/OASIcs.WCET.2007.1238},
  annote =	{Keywords: Worst-case execution time, real-time systems, timing analysis}
}
Document
WCET 2007 -- Report from the WCET Tool Challenge 2006 Ideas for the WCET Tool Challenge 2008

Authors: Jan Gustafsson


Abstract
The purpose of the WCET Tool Challenge is to be able to study, compare and discuss the properties of different WCET tools and approaches, to define common metrics, and to enhance the existing benchmarks. The WCET Tool Challenge has been designed to find a good balance between openness for a wide range of analysis approaches, and specific participation guidelines to provide a level playing field. This should make results transparent and facilitate friendly competition among the participants. This short report presents conclusions from from the WCET Tool Challenge 2006 as well as some ideas for the WCET Tool Challenge 2006.

Cite as

Jan Gustafsson. WCET 2007 -- Report from the WCET Tool Challenge 2006 Ideas for the WCET Tool Challenge 2008. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-2, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{gustafsson:OASIcs.WCET.2007.1198,
  author =	{Gustafsson, Jan},
  title =	{{WCET 2007 -- Report from the WCET Tool Challenge 2006 Ideas for the WCET Tool Challenge 2008}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--2},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1198},
  URN =		{urn:nbn:de:0030-drops-11988},
  doi =		{10.4230/OASIcs.WCET.2007.1198},
  annote =	{Keywords: }
}
Document
A Framework for Static Analysis of VHDL Code

Authors: Marc Schlickling and Markus Pister


Abstract
Software in real time systems underlies strict timing constraints. These are among others hard deadlines regarding the worst-case execution time (WCET) of the application. Thus, the computation of a safe and precise WCET is a key issue1 for validating the behavior of safety-critical systems, e.g. the flight control system in avionics or the airbag control software in the automotive industry. Saarland University and AbsInt Angewandte Informatik GmbH have developed a successful approach for computing the WCET of a task. The resulting tool, called aiT, is based on the abstract interpretation [3, 4] of timing models of the processor and its periphery. Such timing models are hand-crafted and therefore error-prone. Additionally the modeling requires a hard engineering effort, so that the development process is very time consuming. Because modern processors are synthesized from a formal hardware specification, e.g., in VHDL or VERILOG, the hand-crafted timing model can be developed by manually analyzing the processor specification. Due to the complexity of this step, there is a need for support tools that ease the creation of analyzes on such specifi- cations. This paper introduces the primer work on a framework for static analyzes on VHDL.

Cite as

Marc Schlickling and Markus Pister. A Framework for Static Analysis of VHDL Code. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{schlickling_et_al:OASIcs.WCET.2007.1189,
  author =	{Schlickling, Marc and Pister, Markus},
  title =	{{A Framework for Static Analysis of VHDL Code}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--6},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1189},
  URN =		{urn:nbn:de:0030-drops-11891},
  doi =		{10.4230/OASIcs.WCET.2007.1189},
  annote =	{Keywords: Timing Analysis, Worst-Case Execution Time, VHDL, Static Analysis}
}
Document
Analysing Switch-Case Tables by Partial Evaluation

Authors: Niklas Holsti


Abstract
Tracing the flow of control in code generated from switch-case statements is difficult for static program analysis tools when the code contains jumps to dynamically computed target addresses. Analytical methods such as abstract interpretation using integer intervals can work for some forms of switchcase code, for example a jump via a table of addresses indexed 1 .. n, but fail when the target compiler encodes the switch-case structure in a ROM table with a complex format and uses a library routine to interpret the table at runtime. This paper shows how to extract the flow of control from such switch-case tables by partial evaluation of the table-interpreting routine. The resulting control-flow graph allows accurate analysis of the execution time and the logical conditions for reaching each case in the switch-case statement. The method is implemented in Tidorum's Bound-T tool for worstcase executiontime analysis. The implementation builds on some basic BoundT features for modeling program states in the flowgraph and propagating constant values through the graph.

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Niklas Holsti. Analysing Switch-Case Tables by Partial Evaluation. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-8, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{holsti:OASIcs.WCET.2007.1195,
  author =	{Holsti, Niklas},
  title =	{{Analysing Switch-Case Tables by Partial Evaluation}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--8},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1195},
  URN =		{urn:nbn:de:0030-drops-11954},
  doi =		{10.4230/OASIcs.WCET.2007.1195},
  annote =	{Keywords: WCET, switch-case, partial evaluation}
}
Document
Analysis of path exclusion at the machine code level

Authors: Ingmar Stein and Florian Martin


Abstract
We present a method to find static path exclusions in a control flow graph in order to refine the WCET analysis. Using this information, some infeasible paths can be discarded during the ILP-based longest path analysis which helps to improve precision. The new analysis works at the assembly level and uses the Omega library to evaluate Presburger formulas.

Cite as

Ingmar Stein and Florian Martin. Analysis of path exclusion at the machine code level. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{stein_et_al:OASIcs.WCET.2007.1196,
  author =	{Stein, Ingmar and Martin, Florian},
  title =	{{Analysis of path exclusion at the machine code level}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--6},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1196},
  URN =		{urn:nbn:de:0030-drops-11964},
  doi =		{10.4230/OASIcs.WCET.2007.1196},
  annote =	{Keywords: Flow-constraint, control flow graph, path exclusion}
}
Document
Automatic Amortised Worst-Case Execution Time Analysis

Authors: Christoph A. Herrmann, Armelle Bonenfant, Kevin Hammond, Steffen Jost, Hans-Wolfgang Loidl, and Robert Pointon


Abstract
Our research focuses on formally bounded WCET analysis, where we aim to provide absolute guarantees on execution time bounds. In this paper, we describe how amortisation can be used to improve the quality of the results that are obtained from a fully-automatic and formally guaranteed WCET analysis, by delivering analysis results that are parameterised on specific input patterns and which take account of relations between these patterns. We have implemented our approach to give a tool that is capable of predicting execution costs for a typical embedded system development platform, a Renesas board with a Renesas M32C/85U processor. We show that not only is the amortised approach applicable in theory, but that it can be applied automatically to yield good WCET results.

Cite as

Christoph A. Herrmann, Armelle Bonenfant, Kevin Hammond, Steffen Jost, Hans-Wolfgang Loidl, and Robert Pointon. Automatic Amortised Worst-Case Execution Time Analysis. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{herrmann_et_al:OASIcs.WCET.2007.1186,
  author =	{Herrmann, Christoph A. and Bonenfant, Armelle and Hammond, Kevin and Jost, Steffen and Loidl, Hans-Wolfgang and Pointon, Robert},
  title =	{{Automatic Amortised Worst-Case Execution Time Analysis}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--6},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1186},
  URN =		{urn:nbn:de:0030-drops-11868},
  doi =		{10.4230/OASIcs.WCET.2007.1186},
  annote =	{Keywords: Amortisation, functional programming, performance measurement, static analysis, type and effect systems, worst-case execution time}
}
Document
Clustering Worst-Case Execution Times for Software Components

Authors: Johan Fredriksson, Thomas Nolte, Andreas Ermedahl, and Mikael Nolin


Abstract
For component-based systems, classical techniques for Worst-Case Execution Time (WCET) estimation produce unacceptable overestimations of a componentsWCET. This is because software components more general behavior, required in order to facilitate reuse. Existing tools and methods in the context of Component-Based Software Engineering (CBSE) do not yet adequately consider reusable analyses. We present a method that allows different WCETs to be associated with subsets of a components behavior by clustering WCETs with respect to behavior. The method is intended to be used for enabling reusable WCET analysis for reusable software components. We illustrate our technique and demonstrate its potential in achieving tight WCET-estimates for components with rich behavior.

Cite as

Johan Fredriksson, Thomas Nolte, Andreas Ermedahl, and Mikael Nolin. Clustering Worst-Case Execution Times for Software Components. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-7, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{fredriksson_et_al:OASIcs.WCET.2007.1185,
  author =	{Fredriksson, Johan and Nolte, Thomas and Ermedahl, Andreas and Nolin, Mikael},
  title =	{{Clustering Worst-Case Execution Times for Software Components}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--7},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1185},
  URN =		{urn:nbn:de:0030-drops-11852},
  doi =		{10.4230/OASIcs.WCET.2007.1185},
  annote =	{Keywords: Worst-case execution time, Software components, Reuse, Analysis}
}
Document
Data-Flow Based Detection of Loop Bounds

Authors: Christoph Cullmann and Florian Martin


Abstract
To calculate the WCET of a program, safe upper bounds on the number of loop iterations for all loops in the program are needed. As the manual annotation of all loops with such bounds is difficult and time consuming, the WCET analyzer aiT originally developed by Saarland University and AbsInt GmbH uses static analysis to determine the needed bounds as far as possible. This paper describes a novel data-flow based analysis for aiT to calculate the needed loop bounds on the assembler level. The new method is compared with a pattern based loop analysis already in use by this tool.

Cite as

Christoph Cullmann and Florian Martin. Data-Flow Based Detection of Loop Bounds. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{cullmann_et_al:OASIcs.WCET.2007.1193,
  author =	{Cullmann, Christoph and Martin, Florian},
  title =	{{Data-Flow Based Detection of Loop Bounds}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--6},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1193},
  URN =		{urn:nbn:de:0030-drops-11934},
  doi =		{10.4230/OASIcs.WCET.2007.1193},
  annote =	{Keywords: WCET analysis, loop bound detection, flow analysis}
}
Document
Finding DU-Paths for Testing of Multi-Tasking Real-Time Systems using WCET Analysis

Authors: Daniel Sundmark, Anders Petterson, Christer Sandberg, Andreas Ermedahl, and Henrik Thane


Abstract
Memory corruption is one of the most common software failures. For sequential software and multi- tasking software with synchronized data accesses, it has been shown that program faults causing memory cor- ruption can be detected by analyzing the relations be- tween defines and uses of variables (DU-based testing). However, such methods are insufficient in preemptive systems, since they lack the ability to detect inter-task shared variable dependencies. In this paper, we propose the use of a system level shared variable DU analy- sis of preemptive multi-tasking real-time software. By deriving temporal attributes of each access to shared data using WCET analysis, and combining this infor- mation with the real-time schedule information, our method also detects inter-task shared variable depen- dencies. The paper also describes how we extended the SWEET tool to derive these temporal attributes.

Cite as

Daniel Sundmark, Anders Petterson, Christer Sandberg, Andreas Ermedahl, and Henrik Thane. Finding DU-Paths for Testing of Multi-Tasking Real-Time Systems using WCET Analysis. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{sundmark_et_al:OASIcs.WCET.2007.1191,
  author =	{Sundmark, Daniel and Petterson, Anders and Sandberg, Christer and Ermedahl, Andreas and Thane, Henrik},
  title =	{{Finding DU-Paths for Testing of Multi-Tasking Real-Time Systems using WCET Analysis}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--6},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1191},
  URN =		{urn:nbn:de:0030-drops-11914},
  doi =		{10.4230/OASIcs.WCET.2007.1191},
  annote =	{Keywords: Testing, Real-time systems, WCET analysis, data flow}
}
Document
Loop Bound Analysis based on a Combination of Program Slicing, Abstract Interpretation, and Invariant Analysis

Authors: Andreas Ermedahl, Christer Sandberg, Jan Gustafsson, Stefan Bygde, and Björn Lisper


Abstract
Static Worst-Case Execution Time (WCET) analysis is a technique to derive upper bounds for the execution times of programs. Such bounds are crucial when designing and verifying real-time systems. A key component for static derivation of precise WCET estimates is upper bounds on the number of times different loops can be iterated. In this paper we present an approach for deriving upper loop bounds based on a combination of standard program analysis techniques. The idea is to bound the number of different states in the loop which can influence the exit conditions. Given that the loop terminates, this number provides an upper loop bound. An algorithm based on the approach has been implemented in our WCET analysis tool SWEET. We evaluate the algorithm on a number of standard WCET benchmarks, giving evidence that it is capable to derive valid bounds for many types of loops.

Cite as

Andreas Ermedahl, Christer Sandberg, Jan Gustafsson, Stefan Bygde, and Björn Lisper. Loop Bound Analysis based on a Combination of Program Slicing, Abstract Interpretation, and Invariant Analysis. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{ermedahl_et_al:OASIcs.WCET.2007.1194,
  author =	{Ermedahl, Andreas and Sandberg, Christer and Gustafsson, Jan and Bygde, Stefan and Lisper, Bj\"{o}rn},
  title =	{{Loop Bound Analysis based on a Combination of Program Slicing, Abstract Interpretation, and Invariant Analysis}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--6},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1194},
  URN =		{urn:nbn:de:0030-drops-11946},
  doi =		{10.4230/OASIcs.WCET.2007.1194},
  annote =	{Keywords: WCET analysis, loop-bound analysis, program slicing, abstract interpretation, invariant analysis}
}
Document
Measurements or Static Analysis or Both?

Authors: Stefan M. Petters, Patryk Zadarnowski, and Gernot Heiser


Abstract
To date, measurement-based WCET analysis and static analysis have largely been seen as being at odds with each other. We argue that instead they should be considered complementary, and that the combination of both represents a promising approach that provides benefits over either individual approach. In this paper we discuss in some detail how we aim to improve on our probabilistic measurement-based technique by adding static cache analysis. Specifically we are planning to make use of recent advances within the functional languages research community. The objective of this paper is not to present finished or almost finished work. Instead we hope to trigger discussion and solicit feedback from the community in order to avoid pitfalls experienced by others and to help focus our research.

Cite as

Stefan M. Petters, Patryk Zadarnowski, and Gernot Heiser. Measurements or Static Analysis or Both?. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-7, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{petters_et_al:OASIcs.WCET.2007.1188,
  author =	{Petters, Stefan M. and Zadarnowski, Patryk and Heiser, Gernot},
  title =	{{Measurements or Static Analysis or Both?}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--7},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1188},
  URN =		{urn:nbn:de:0030-drops-11886},
  doi =		{10.4230/OASIcs.WCET.2007.1188},
  annote =	{Keywords: Measurement based Approach, Static Analysis, Cache Analysis, Proof, Overestimation}
}
Document
Timing Analysis of Body Area Network Applications

Authors: Liang Yun, Abhik Roychoudhury, and Tulika Mitra


Abstract
Body area network (BAN) applications have stringent timing requirements. The timing behavior of a BAN application is determined not only by the software complexity, inputs, and architecture, but also by the timing behavior of the peripherals. This paper presents systematic timing analysis of such applications, deployed for health-care monitoring of patients staying at home. This monitoring is used to achieve prompt notification of the hospital when a patient shows abnormal vital signs. Due to the safetycritical nature of these applications,worst-case execution time (WCET) analysis is extremely important.

Cite as

Liang Yun, Abhik Roychoudhury, and Tulika Mitra. Timing Analysis of Body Area Network Applications. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{yun_et_al:OASIcs.WCET.2007.1192,
  author =	{Yun, Liang and Roychoudhury, Abhik and Mitra, Tulika},
  title =	{{Timing Analysis of Body Area Network Applications}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--6},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1192},
  URN =		{urn:nbn:de:0030-drops-11924},
  doi =		{10.4230/OASIcs.WCET.2007.1192},
  annote =	{Keywords: WCET analysis of Peripherals, Body Area Network applications}
}
Document
Towards Symbolic State Traversal for Efficient WCET Analysis of Abstract Pipeline and Cache Models

Authors: Stephan Wilhelm and Björn Wachter


Abstract
Static program analysis is a proven approach for obtaining safe and tight upper bounds on the worst-case execution time (WCET) of program tasks. It requires an analysis on the microarchitectural level, most notably pipeline and cache analysis. In our approach, the integrated pipeline and cache analysis operates on sets of possible abstract hardware states. Due to the growth of CPU complexity and the existence of timing anomalies, the analysis must handle an increasing number of possible abstract states for each program point. Symbolic methods have been proposed as a way to reduce memory consumption and improve runtime in order to keep pace with the growing hardware complexity. This paper presents the advances made since the original proposal and discusses a compact representation of abstract caches for integration with symbolic pipeline analysis.

Cite as

Stephan Wilhelm and Björn Wachter. Towards Symbolic State Traversal for Efficient WCET Analysis of Abstract Pipeline and Cache Models. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-6, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{wilhelm_et_al:OASIcs.WCET.2007.1190,
  author =	{Wilhelm, Stephan and Wachter, Bj\"{o}rn},
  title =	{{Towards Symbolic State Traversal for Efficient WCET Analysis of Abstract Pipeline and Cache Models}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--6},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1190},
  URN =		{urn:nbn:de:0030-drops-11904},
  doi =		{10.4230/OASIcs.WCET.2007.1190},
  annote =	{Keywords: WCET, worst-case execution time, hard real-time, embedded systems, abstract interpretation, pipeline analysis, cache analysis, symbolic state traversal BDD}
}
Document
WCET Analysis: The Annotation Language Challenge

Authors: Raimund Kirner, Jens Knoop, Adrian Prantl, Markus Schordan, and Ingomar Wenzel


Abstract
Worst-case execution time (WCET) analysis is indispensable for the successful design and development of systems, which, in addition to their functional constraints, have to satisfy hard real-time constraints. The expressiveness and usability of annotation languages, which are used by algorithms and tools for WCET analysis in order to separate feasible from infeasible program paths, have a crucial impact on the precision and performance of these algorithms and tools. In this paper, we thus propose to complement the WCET tool challenge, which has recently successfully been launched, by a second closely related challenge: the WCET annotation language challenge. We believe that contributions towards mastering this challenge will be essential for the next major step of advancing the field of WCET analysis.

Cite as

Raimund Kirner, Jens Knoop, Adrian Prantl, Markus Schordan, and Ingomar Wenzel. WCET Analysis: The Annotation Language Challenge. In 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07). Open Access Series in Informatics (OASIcs), Volume 6, pp. 1-17, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{kirner_et_al:OASIcs.WCET.2007.1197,
  author =	{Kirner, Raimund and Knoop, Jens and Prantl, Adrian and Schordan, Markus and Wenzel, Ingomar},
  title =	{{WCET Analysis: The Annotation Language Challenge}},
  booktitle =	{7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)},
  pages =	{1--17},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-05-7},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{6},
  editor =	{Rochange, Christine},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2007.1197},
  URN =		{urn:nbn:de:0030-drops-11974},
  doi =		{10.4230/OASIcs.WCET.2007.1197},
  annote =	{Keywords: Worst-case execution time analysis, WCET, path description, annotation language challenge, expressiveness, convenience}
}

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