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Documents authored by Royuela, Sara


Document
Schedulability Analysis of OpenMP Applications Under Heuristic Task-To-Thread Mapping

Authors: Mohammad Samadi, Tiago Carvalho, Luís Miguel Pinho, and Sara Royuela

Published in: OASIcs, Volume 140, 7th Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2026)


Abstract
Task-to-thread mapping is a key process in parallel applications to achieve the best possible performance. This process is even more challenging when it is required to meet the schedulability and timing requirements of critical systems. In these systems, mapping tasks to threads is usually carried out using static scheduling (i.e., offline mapping) to improve system schedulability, with several approaches being presented in the literature. Nevertheless, there has been little analysis on the impact that these static mapping approaches have on the schedulability of applications exploiting OpenMP, a model increasingly seen as a suitable mechanism to leverage the potential of parallel and heterogeneous processor architectures. This paper, therefore, performs a throughout evaluation of the recently presented heuristic task-to-thread mapping working with different heuristics through allocation and dispatching phases, compared with state-of-the-art, in terms of schedulability. This process is performed using a state-of-the-art schedulability analysis methodology through an integration of our simulator and an existing schedulability toolset. This evaluation allows for identifying the static heuristic mapping approaches that achieve tighter schedulability analysis than other methods in the literature.

Cite as

Mohammad Samadi, Tiago Carvalho, Luís Miguel Pinho, and Sara Royuela. Schedulability Analysis of OpenMP Applications Under Heuristic Task-To-Thread Mapping. In 7th Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2026). Open Access Series in Informatics (OASIcs), Volume 140, pp. 2:1-2:12, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2026)


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@InProceedings{samadi_et_al:OASIcs.NG-RES.2026.2,
  author =	{Samadi, Mohammad and Carvalho, Tiago and Pinho, Lu{\'\i}s Miguel and Royuela, Sara},
  title =	{{Schedulability Analysis of OpenMP Applications Under Heuristic Task-To-Thread Mapping}},
  booktitle =	{7th Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2026)},
  pages =	{2:1--2:12},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-95977-415-4},
  ISSN =	{2190-6807},
  year =	{2026},
  volume =	{140},
  editor =	{Ali, Hazem Ismail and Kurunathan, Harrison},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.NG-RES.2026.2},
  URN =		{urn:nbn:de:0030-drops-254204},
  doi =		{10.4230/OASIcs.NG-RES.2026.2},
  annote =	{Keywords: OpenMP, task-to-thread mapping, heuristics, response time, schedulability}
}
Artifact
Software
GuardianOMP

Authors: Adrian Munera and Sara Royuela


Abstract

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Adrian Munera, Sara Royuela. GuardianOMP (Software, GuardianOMP Tool for task-based replication with OpenMP). Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2025)


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@misc{dagstuhl-artifact-22922,
   title = {{GuardianOMP}}, 
   author = {Munera, Adrian and Royuela, Sara},
   note = {Software, version 1.0., This software has been developed with funds from the HiPART project, with reference PID2023-148117NA-I00 and financed by MICIU/AEI /10.13039/501100011033 and FEDER, UE, and the LIONESS project, with Contract No. 4000141286/23/NL/GLC/ov under a program of, and funded by the European Space Agency. (visited on 2025-02-27)},
   url = {https://anonymous.4open.science/r/GuardianOMP-4233/README.md},
   doi = {10.4230/artifacts.22922},
}
Artifact
Software
LLVM for OpenMP event-based synchronization in taskgraphs

Authors: Cyril Cetre, Chenle Yu, and Sara Royuela


Abstract

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Cyril Cetre, Chenle Yu, Sara Royuela. LLVM for OpenMP event-based synchronization in taskgraphs (Software, LLVM for OpenMP event-based synchronization in taskgraphs). Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2025)


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@misc{dagstuhl-artifact-22923,
   title = {{LLVM for OpenMP event-based synchronization in taskgraphs}}, 
   author = {Cetre, Cyril and Yu, Chenle and Royuela, Sara},
   note = {Software, version 1.0., This software has been developed with funds from the RisingStars project, under the Marie Skłodowska-Curie grant agreement No 873120 from the European Union’s Horizon 2020 research and innovation programme, and the HiPART project, with reference PID2023-148117NA-I00 and financed by MICIU/AEI /10.13039/501100011033 and FEDER, UE., swhId: \href{https://archive.softwareheritage.org/swh:1:dir:aa51e2f008a05c550f7f0f9b2359a13165b8094a;origin=https://gitlab.bsc.es/ppc-bsc/software/llvm-taskgraph.git;visit=swh:1:snp:2d3f0c60d87275c6edf15c2e686c8f2929555057;anchor=swh:1:rev:97ab8da12f3578e7bec4d5b86517b5edcc6bb74c}{\texttt{swh:1:dir:aa51e2f008a05c550f7f0f9b2359a13165b8094a}} (visited on 2025-02-27)},
   url = {https://gitlab.bsc.es/ppc-bsc/software/llvm-taskgraph/-/tree/cudaGraph_RTevent},
   doi = {10.4230/artifacts.22923},
}
Artifact
Software
LLVM for adaptive parallelism with dynamic variants

Authors: Adrian Munera, Guerau Dasca, and Sara Royuela


Abstract

Cite as

Adrian Munera, Guerau Dasca, Sara Royuela. LLVM for adaptive parallelism with dynamic variants (Software, LLVM for adaptive parallelism). Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2025)


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@misc{dagstuhl-artifact-22924,
   title = {{LLVM for adaptive parallelism with dynamic variants}}, 
   author = {Munera, Adrian and Dasca, Guerau and Royuela, Sara},
   note = {Software, version 1.0., This software has been developed with funds from the LIONESS project, with Contract No. 4000141286/23/NL/GLC/ov under a program of, and funded by the European Space Agency, and the RisingStars project, under the Marie Skłodowska-Curie grant agreement No 873120 from the European Union’s Horizon 2020 research and innovation programme., swhId: \href{https://archive.softwareheritage.org/swh:1:dir:a43d82b3d564a56f1a25347ff9a0beec81def2d5;origin=https://gitlab.bsc.es/ppc-bsc/research/c3po2024-dynamicvariants;visit=swh:1:snp:47f4fb5cee1ee150c654a85a25beab1dde96908a;anchor=swh:1:rev:46ceb084445cd70172f08d5698b78d272873efe9}{\texttt{swh:1:dir:a43d82b3d564a56f1a25347ff9a0beec81def2d5}} (visited on 2025-02-27)},
   url = {https://gitlab.bsc.es/ppc-bsc/research/c3po2024-dynamicvariants},
   doi = {10.4230/artifacts.22924},
}
Document
HiPART: High-Performance Technology for Advanced Real-Time Systems

Authors: Sara Royuela, Adrian Munera, Chenle Yu, and Josep Pinot

Published in: OASIcs, Volume 127, 16th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 14th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2025)


Abstract
Cyber-physical systems (CPS) attempt to meet real-time and safety requirements by using hypervisors that provide isolation via virtualisation and Real-Time Operating Systems that manage the concurrency of system tasks. However, the operating system’s (OS) decisions may hinder the efficiency of tasks because it needs more awareness of their specific intricacies. Hence, one critical limitation to efficiently developing CPSs is the lack of tailored parallel programming models that can harness the capabilities of advanced heterogeneous architectures while meeting the requirements integral to CPSs, such as real-time behaviour and safety requirements. While conventional HPC languages, like OpenMP and CUDA, cannot accommodate critical non-functional properties, safety languages, like Rust and Ada, are limited in their capabilities to exploit complex systems efficiently. On top of that, accessibility to the programming task is essential to making the system usable to different domain experts. HiPART tackles these challenges by developing a comprehensive framework holistically addressing efficiency, interoperability, reliability, and sustainability. The HiPART framework, based on OpenMP, provides tailored support for (1) real-time behaviour and safety requirements and (2) the efficient exploitation of advanced parallel and heterogeneous processor architectures. This support is exposed to users through extensions to the OpenMP specification and its implementation in the LLVM framework, including the compiler and the OpenMP runtime library. With this framework, HiPART will contribute to realising more capable and reliable autonomous systems across various domains, from autonomous mobility to space exploration.

Cite as

Sara Royuela, Adrian Munera, Chenle Yu, and Josep Pinot. HiPART: High-Performance Technology for Advanced Real-Time Systems. In 16th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 14th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2025). Open Access Series in Informatics (OASIcs), Volume 127, pp. 6:1-6:15, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2025)


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@InProceedings{royuela_et_al:OASIcs.PARMA-DITAM.2025.6,
  author =	{Royuela, Sara and Munera, Adrian and Yu, Chenle and Pinot, Josep},
  title =	{{HiPART: High-Performance Technology for Advanced Real-Time Systems}},
  booktitle =	{16th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 14th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2025)},
  pages =	{6:1--6:15},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-95977-363-8},
  ISSN =	{2190-6807},
  year =	{2025},
  volume =	{127},
  editor =	{Cattaneo, Daniele and Fazio, Maria and Kosmidis, Leonidas and Morabito, Gabriele},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.PARMA-DITAM.2025.6},
  URN =		{urn:nbn:de:0030-drops-229108},
  doi =		{10.4230/OASIcs.PARMA-DITAM.2025.6},
  annote =	{Keywords: Cyber-physical systems, OpenMP, Parallel and heterogeneous architectures, Efficiency, Adaptability, Interoperability, Real-time, Resilience, Reliability}
}
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