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DARTS, Volume 5, Issue 1

Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019)



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Front Matter
Front Matter - ECRTS 2019 Artifacts, Table of Contents, Preface, Artifact Evaluation Committee

Authors: Sophie Quinton, Sebastian Altmeyer, and Alessandro Papadopoulos


Abstract
Front Matter - ECRTS 2019 Artifacts, Table of Contents, Preface, Artifact Evaluation Committee

Cite as

Sophie Quinton, Sebastian Altmeyer, and Alessandro Papadopoulos. Front Matter - ECRTS 2019 Artifacts, Table of Contents, Preface, Artifact Evaluation Committee. In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 0:i-0:ix, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{quinton_et_al:DARTS.5.1.0,
  author =	{Quinton, Sophie and Altmeyer, Sebastian and Papadopoulos, Alessandro},
  title =	{{Front Matter - ECRTS 2019 Artifacts, Table of Contents, Preface, Artifact Evaluation Committee}},
  pages =	{0:i--0:ix},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Quinton, Sophie and Altmeyer, Sebastian and Papadopoulos, Alessandro},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.0},
  URN =		{urn:nbn:de:0030-drops-107282},
  doi =		{10.4230/DARTS.5.1.0},
  annote =	{Keywords: Front Matter - ECRTS 2019 Artifacts, Table of Contents, Preface, Artifact Evaluation Committee}
}
Document
Artifact
Dual Priority Scheduling is Not Optimal (Artifact)

Authors: Pontus Ekberg


Abstract
In dual priority scheduling, periodic tasks are executed in a fixed-priority manner, but each job has two phases with different priorities. The second phase is entered after a fixed amount of time has passed since the release of the job, at which point the job changes its priority. Dual priority scheduling was introduced by Burns and Wellings in 1993 and was shown to successfully schedule many task sets that are not schedulable with ordinary (single) fixed-priority scheduling. Burns and Wellings conjectured that dual priority scheduling is an optimal scheduling algorithm for synchronous periodic tasks with implicit deadlines on preemptive uniprocessors. The related article presents counterexamples to this conjecture, and to some related conjectures that have since been stated. This artifact verifies the counterexamples by means of exhaustive simulations of vast numbers of configurations.

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Pontus Ekberg. Dual Priority Scheduling is Not Optimal (Artifact). In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 1:1-1:2, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{ekberg:DARTS.5.1.1,
  author =	{Ekberg, Pontus},
  title =	{{Dual Priority Scheduling is Not Optimal}},
  pages =	{1:1--1:2},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Ekberg, Pontus},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.1},
  URN =		{urn:nbn:de:0030-drops-107293},
  doi =		{10.4230/DARTS.5.1.1},
  annote =	{Keywords: Scheduling, real time systems, dual priority}
}
Document
Artifact
NPM-BUNDLE: Non-Preemptive Multitask Scheduling for Jobs with BUNDLE-Based Thread-Level Scheduling (Artifact)

Authors: Corey Tessler and Nathan Fisher


Abstract
The BUNDLE and BUNDLEP scheduling algorithms are cache-cognizant thread-level scheduling algorithms and associated worst case execution time and cache overhead (WCETO) techniques for hard real-time multi-threaded tasks. The BUNDLE-based approaches utilize the inter-thread cache benefit to reduce WCETO values for jobs. Currently, the BUNDLE-based approaches are limited to scheduling a single task. This work aims to expand the applicability of BUNDLE-based scheduling to multiple task multi-threaded task sets. BUNDLE-based scheduling leverages knowledge of potential cache conflicts to selectively preempt one thread in favor of another from the same job. This thread-level preemption is a requirement for the run-time behavior and WCETO calculation to receive the benefit of BUNDLE-based approaches. This work proposes scheduling BUNDLE-based jobs non-preemptively according to the earliest deadline first (EDF) policy. Jobs are forbidden from preempting one another, while threads within a job are allowed to preempt other threads. An accompanying schedulability test is provided, named Threads Per Job (TPJ). TPJ is a novel schedulability test, input is a task set specification which may be transformed (under certain restrictions); dividing threads among tasks in an effort to find a feasible task set. Enhanced by the flexibility to transform task sets and taking advantage of the inter-thread cache benefit, the evaluation shows TPJ scheduling task sets fully preemptive EDF cannot.

Cite as

Corey Tessler and Nathan Fisher. NPM-BUNDLE: Non-Preemptive Multitask Scheduling for Jobs with BUNDLE-Based Thread-Level Scheduling (Artifact). In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 2:1-2:2, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{tessler_et_al:DARTS.5.1.2,
  author =	{Tessler, Corey and Fisher, Nathan},
  title =	{{NPM-BUNDLE: Non-Preemptive Multitask Scheduling for Jobs with BUNDLE-Based Thread-Level Scheduling}},
  pages =	{2:1--2:2},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Tessler, Corey and Fisher, Nathan},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.2},
  URN =		{urn:nbn:de:0030-drops-107306},
  doi =		{10.4230/DARTS.5.1.2},
  annote =	{Keywords: Scheduling algorithms, Cache Memory, Multi-threading, Static Analysis}
}
Document
Artifact
DMAC: Deadline-Miss-Aware Control (Artifact)

Authors: Paolo Pazzaglia, Claudio Mandrioli, Martina Maggio, and Anton Cervin


Abstract
The real-time implementation of periodic controllers requires solving a co-design problem, in which the choice of the controller sampling period is a crucial element. Classic design techniques limit the period exploration to safe values, that guarantee the correct execution of the controller alongside the remaining real-time load, i.e., ensuring that the controller worst-case response time does not exceed its deadline. This paper presents the artifact linked to DMAC: the first formally-grounded controller design strategy that explores shorter periods, thus explicitly taking into account the possibility of missing deadlines. The experimental results obtained with this artifact show that the DMAC design proposal - i.e., exploring the space where deadlines can be missed and handled with different strategies - greatly outperforms classical control design techniques.

Cite as

Paolo Pazzaglia, Claudio Mandrioli, Martina Maggio, and Anton Cervin. DMAC: Deadline-Miss-Aware Control (Artifact). In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 3:1-3:3, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{pazzaglia_et_al:DARTS.5.1.3,
  author =	{Pazzaglia, Paolo and Mandrioli, Claudio and Maggio, Martina and Cervin, Anton},
  title =	{{DMAC: Deadline-Miss-Aware Control}},
  pages =	{3:1--3:3},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Pazzaglia, Paolo and Mandrioli, Claudio and Maggio, Martina and Cervin, Anton},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.3},
  URN =		{urn:nbn:de:0030-drops-107315},
  doi =		{10.4230/DARTS.5.1.3},
  annote =	{Keywords: Weakly-Hard Real-Time Systems, Deadline Miss Handling, Control Design}
}
Document
Artifact
API Comparison of CPU-To-GPU Command Offloading Latency on Embedded Platforms (Artifact)

Authors: Roberto Cavicchioli, Nicola Capodieci, Marco Solieri, and Marko Bertogna


Abstract
High-performance heterogeneous embedded platforms allow offloading of parallel workloads to an integrated accelerator, such as General Purpose-Graphic Processing Units (GP-GPUs). A time-predictable characterization of task submission is a must in real-time applications. We provide a profiler of the time spent by the CPU for submitting stereotypical GP-GPU workload shaped as a Deep Neural Network of parameterized complexity. The submission is performed using the latest API available: NVIDIA CUDA, including its various techniques, and Vulkan. Complete automation for the test on Jetson Xavier is also provided by scripts that install software dependencies, run the experiments, and collect results in a PDF report.

Cite as

Roberto Cavicchioli, Nicola Capodieci, Marco Solieri, and Marko Bertogna. API Comparison of CPU-To-GPU Command Offloading Latency on Embedded Platforms (Artifact). In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 4:1-4:3, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{cavicchioli_et_al:DARTS.5.1.4,
  author =	{Cavicchioli, Roberto and Capodieci, Nicola and Solieri, Marco and Bertogna, Marko},
  title =	{{API Comparison of CPU-To-GPU Command Offloading Latency on Embedded Platforms}},
  pages =	{4:1--4:3},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Cavicchioli, Roberto and Capodieci, Nicola and Solieri, Marco and Bertogna, Marko},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.4},
  URN =		{urn:nbn:de:0030-drops-107322},
  doi =		{10.4230/DARTS.5.1.4},
  annote =	{Keywords: GPU, Applications, Heterogeneus systems}
}
Document
Artifact
Response-Time Analysis of ROS 2 Processing Chains Under Reservation-Based Scheduling (Artifact)

Authors: Daniel Casini, Tobias Blaß, Ingo Lütkebohle, and Björn B. Brandenburg


Abstract
This artifact provides the means to validate and reproduce the results of the associated paper "Response-Time Analysis of ROS 2 Processing Chains under Reservation-Based Scheduling." It consists of two independent components. First, it contains a model validation component that validates the paper’s claims about the ROS 2 executor’s callback scheduling. Second, it contains the source code for the paper’s case study, i.e., an implementation of the proposed response-time analysis and a model of the move_base navigation stack.

Cite as

Daniel Casini, Tobias Blaß, Ingo Lütkebohle, and Björn B. Brandenburg. Response-Time Analysis of ROS 2 Processing Chains Under Reservation-Based Scheduling (Artifact). In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 5:1-5:2, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{casini_et_al:DARTS.5.1.5,
  author =	{Casini, Daniel and Bla{\ss}, Tobias and L\"{u}tkebohle, Ingo and Brandenburg, Bj\"{o}rn B.},
  title =	{{Response-Time Analysis of ROS 2 Processing Chains Under Reservation-Based Scheduling}},
  pages =	{5:1--5:2},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Casini, Daniel and Bla{\ss}, Tobias and L\"{u}tkebohle, Ingo and Brandenburg, Bj\"{o}rn B.},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.5},
  URN =		{urn:nbn:de:0030-drops-107330},
  doi =		{10.4230/DARTS.5.1.5},
  annote =	{Keywords: ROS, real-time systems, response-time analysis, robotics, resource reservation}
}
Document
Artifact
Scheduling Self-Suspending Tasks: New and Old Results (Artifact)

Authors: Jian-Jia Chen, Tobias Hahn, Ruben Hoeksma, Nicole Megow, and Georg von der Brüggen


Abstract
In computing systems, a job may suspend itself (before it finishes its execution) when it has to wait for certain results from other (usually external) activities. For real-time systems, such self-suspension behavior has been shown to induce performance degradation. Hence, the researchers in the real-time systems community have devoted themselves to the design and analysis of scheduling algorithms that can alleviate the performance penalty due to self-suspension behavior. As self-suspension and delegation of parts of a job to non-bottleneck resources is pretty natural in many applications, researchers in the operations research (OR) community have also explored scheduling algorithms for systems with such suspension behavior, called the master-slave problem in the OR community. This paper first reviews the results for the master-slave problem in the OR literature and explains their impact on several long-standing problems for scheduling self-suspending real-time tasks. For frame-based periodic real-time tasks, in which the periods of all tasks are identical and all jobs related to one frame are released synchronously, we explore different approximation metrics with respect to resource augmentation factors under different scenarios for both uniprocessor and multiprocessor systems, and demonstrate that different approximation metrics can create different levels of difficulty for the approximation. Our experimental results show that such more carefully designed schedules can significantly outperform the state-of-the-art.

Cite as

Jian-Jia Chen, Tobias Hahn, Ruben Hoeksma, Nicole Megow, and Georg von der Brüggen. Scheduling Self-Suspending Tasks: New and Old Results (Artifact). In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 6:1-6:3, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{chen_et_al:DARTS.5.1.6,
  author =	{Chen, Jian-Jia and Hahn, Tobias and Hoeksma, Ruben and Megow, Nicole and von der Br\"{u}ggen, Georg},
  title =	{{Scheduling Self-Suspending Tasks: New and Old Results}},
  pages =	{6:1--6:3},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Chen, Jian-Jia and Hahn, Tobias and Hoeksma, Ruben and Megow, Nicole and von der Br\"{u}ggen, Georg},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.6},
  URN =		{urn:nbn:de:0030-drops-107349},
  doi =		{10.4230/DARTS.5.1.6},
  annote =	{Keywords: Self-suspension, master-slave problem, computational complexity, speedup factors}
}
Document
Artifact
Modeling Cache Coherence to Expose Interference (Artifact)

Authors: Nathanaël Sensfelder, Julien Brunel, and Claire Pagetti


Abstract
To facilitate programming, most multi-core processors feature automated mechanisms maintaining coherence between each core’s cache. These mechanisms introduce interference, that is, delays caused by concurrent access to a shared resource. This type of interference is hard to predict, leading to the mechanisms being shunned by real-time system designers, at the cost of potential benefits in both running time and system complexity. We believe that formal methods can provide the means to ensure that the effects of this interference are properly exposed and mitigated. Consequently, we propose a nascent framework relying on timed automata to model and analyze the interference caused by cache coherence.

Cite as

Nathanaël Sensfelder, Julien Brunel, and Claire Pagetti. Modeling Cache Coherence to Expose Interference (Artifact). In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 7:1-7:2, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{sensfelder_et_al:DARTS.5.1.7,
  author =	{Sensfelder, Nathana\"{e}l and Brunel, Julien and Pagetti, Claire},
  title =	{{Modeling Cache Coherence to Expose Interference}},
  pages =	{7:1--7:2},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Sensfelder, Nathana\"{e}l and Brunel, Julien and Pagetti, Claire},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.7},
  URN =		{urn:nbn:de:0030-drops-107358},
  doi =		{10.4230/DARTS.5.1.7},
  annote =	{Keywords: Real-time systems, multi-core processor, cache coherence, formal methods}
}
Document
Artifact
Simultaneous Multithreading Applied to Real Time (Artifact)

Authors: Sims Hill Osborne, Joshua J. Bakita, and James H. Anderson


Abstract
Existing models used in real-time scheduling are inadequate to take advantage of simultaneous multithreading (SMT), which has been shown to improve performance in many areas of computing, but has seen little application to real-time systems. The SMART task model, which allows for combining SMT and real time by accounting for the variable task execution costs caused by SMT, is introduced, along with methods and conditions for scheduling SMT tasks under global earliest-deadline-first scheduling. The benefits of using SMT are demonstrated through a large-scale schedulability study in which we show that task systems with utilizations 30% larger than what would be schedulable without SMT can be correctly scheduled. This artifact includes benchmark experiments used to compare execution times with and without SMT and code to duplicate the reported schedulability experiments.

Cite as

Sims Hill Osborne, Joshua J. Bakita, and James H. Anderson. Simultaneous Multithreading Applied to Real Time (Artifact). In Special Issue of the 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Dagstuhl Artifacts Series (DARTS), Volume 5, Issue 1, pp. 8:1-8:2, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2019)


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@Article{osborne_et_al:DARTS.5.1.8,
  author =	{Osborne, Sims Hill and Bakita, Joshua J. and Anderson, James H.},
  title =	{{Simultaneous Multithreading Applied to Real Time}},
  pages =	{8:1--8:2},
  journal =	{Dagstuhl Artifacts Series},
  ISSN =	{2509-8195},
  year =	{2019},
  volume =	{5},
  number =	{1},
  editor =	{Osborne, Sims Hill and Bakita, Joshua J. and Anderson, James H.},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DARTS.5.1.8},
  URN =		{urn:nbn:de:0030-drops-107362},
  doi =		{10.4230/DARTS.5.1.8},
  annote =	{Keywords: real-time systems, simultaneous multithreading, soft real-time, scheduling algorithms}
}

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