Volume

OASIcs, Volume 23

12th International Workshop on Worst-Case Execution Time Analysis

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Event

WCET 2012, July 10, 2012, Pisa, Italy

Editor

Tullio Vardanega

Publication Details

  • published at: 2012-07-10
  • Publisher: Schloss Dagstuhl – Leibniz-Zentrum für Informatik
  • ISBN: 978-3-939897-41-5
  • DBLP: db/conf/wcet/wcet2012

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Document
Complete Volume
DOI: 10.4230/OASIcs.WCET.2012
OASIcs, Volume 23, WCET'12, Complete Volume

Authors: Tullio Vardanega

Abstract
OASIcs, Volume 23, WCET'12, Complete Volume
Cite as

12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@Proceedings{vardanega:OASIcs.WCET.2012,
  title =	{{OASIcs, Volume 23, WCET'12, Complete Volume}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012},
  URN =		{urn:nbn:de:0030-drops-35928},
  doi =		{10.4230/OASIcs.WCET.2012},
  annote =	{Keywords: \lbrackSpecial-Purpose and Application-Based Systems\rbrack: Real-time and embedded systems, \lbrackPerformance of systems\rbrack: Modelling techniques, Performance attribute Software/Program Verification, Testing and Debugging, \lbrackSoftware Engineering\rbrack: Software Architectures – Domain-specific architectures, Patterns}
}
Document
Front Matter
DOI: 10.4230/OASIcs.WCET.2012.i
Frontmatter, Table of Contents, Preface, Workshop Organization, List of Authors

Authors: Tullio Vardanega

Abstract
Frontmatter, Table of Contents, Preface, Workshop Organization, List of Authors
Cite as

12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. i-xi, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{vardanega:OASIcs.WCET.2012.i,
  author =	{Vardanega, Tullio},
  title =	{{Frontmatter, Table of Contents, Preface, Workshop Organization, List of Authors}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{i--xi},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.i},
  URN =		{urn:nbn:de:0030-drops-35625},
  doi =		{10.4230/OASIcs.WCET.2012.i},
  annote =	{Keywords: Frontmatter, Table of Contents, Preface, Workshop Organization, List of Authors}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.1
What is a Timing Anomaly?

Authors: Franck Cassez, René Rydhof Hansen, and Mads Chr. Olesen

Abstract
Timing anomalies make worst-case execution time analysis much harder, because the analysis will have to consider all local choices. It has been widely recognised that certain hardware features are timing anomalous, while others are not. However, defining formally what a timing anomaly is, has been difficult. We examine previous definitions of timing anomalies, and identify examples where they do not align with common observations. We then provide a definition for consistently slower hardware traces that can be used to define timing anomalies and aligns with common observations.
Cite as

Franck Cassez, René Rydhof Hansen, and Mads Chr. Olesen. What is a Timing Anomaly?. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 1-12, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{cassez_et_al:OASIcs.WCET.2012.1,
  author =	{Cassez, Franck and Hansen, Ren\'{e} Rydhof and Olesen, Mads Chr.},
  title =	{{What is a Timing Anomaly?}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{1--12},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.1},
  URN =		{urn:nbn:de:0030-drops-35521},
  doi =		{10.4230/OASIcs.WCET.2012.1},
  annote =	{Keywords: Timing anomalies, worst case execution time (WCET), abstractions}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.13
An Empirical Evaluation of the Influence of the Load-Store Unit on WCET Analysis

Authors: Mohamed Abdel Maksoud and Jan Reineke

Abstract
Due to the complexity of today’s micro-architectures, the micro-architectural analysis usually constitutes the most time-consuming step in worst-case execution time (WCET) analysis. In this paper, we investigate the influence of the design of the load-store unit (LSU) in the PowerPC 7448 on WCET analysis. To this end, we introduce a simplified variant of the existing design of the LSU by reducing its queue sizes. Using AbsInt's aiT WCET analysis toolchain we determine the resulting WCET bounds and analysis times. For the modified version of the LSU with reduced queue sizes, analysis time is reduced by more than 50% on a set of benchmarks from the Mälardalen suite, while there is little change in the WCET bound.
Cite as

Mohamed Abdel Maksoud and Jan Reineke. An Empirical Evaluation of the Influence of the Load-Store Unit on WCET Analysis. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 13-24, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{abdelmaksoud_et_al:OASIcs.WCET.2012.13,
  author =	{Abdel Maksoud, Mohamed and Reineke, Jan},
  title =	{{An Empirical Evaluation of the Influence of the Load-Store Unit on WCET Analysis}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{13--24},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.13},
  URN =		{urn:nbn:de:0030-drops-35536},
  doi =		{10.4230/OASIcs.WCET.2012.13},
  annote =	{Keywords: Empirical evaluation, architecture complexity effect, WCET analysis precision, WCET analysis performance, PowerPC 7448, Load-Store Unit}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.25
Computing Same Block Relations for Relational Cache Analysis

Authors: Simon Wegener

Abstract
In contrast to the classical cache analysis of Ferdinand, the relational cache analysis does not rely on precise address information. Instead, it uses same block relations between memory accesses to predict cache hits. The relational data cache analysis can thus also predict cache hits if fully unrolling a loop is not feasible during analysis, for example due to high memory consumption or long computation time. This paper proposes a static analysis based on abstract interpretation which is able to compute same block relations for relational cache analysis.
Cite as

Simon Wegener. Computing Same Block Relations for Relational Cache Analysis. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 25-37, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{wegener:OASIcs.WCET.2012.25,
  author =	{Wegener, Simon},
  title =	{{Computing Same Block Relations for Relational Cache Analysis}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{25--37},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.25},
  URN =		{urn:nbn:de:0030-drops-35544},
  doi =		{10.4230/OASIcs.WCET.2012.25},
  annote =	{Keywords: Cache Analysis, WCET Analysis, Real-time Systems, Static Program Analysis, Abstract Interpretation}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.38
Toward Static Timing Analysis of Parallel Software

Authors: Andreas Gustavsson, Jan Gustafsson, and Björn Lisper

Abstract
The current trend within computer, and even real-time, systems is to incorporate parallel hardware, e.g., multicore processors, and parallel software. Thus, the ability to safely analyse such parallel systems, e.g., regarding the timing behaviour, becomes necessary. Static timing analysis is an approach to mathematically derive safe bounds on the execution time of a program, when executed on a given hardware platform. This paper presents an algorithm that statically analyses the timing of parallel software, with threads communicating through shared memory, using abstract interpretation. It also gives an extensive example to clarify how the algorithm works.
Cite as

Andreas Gustavsson, Jan Gustafsson, and Björn Lisper. Toward Static Timing Analysis of Parallel Software. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 38-47, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{gustavsson_et_al:OASIcs.WCET.2012.38,
  author =	{Gustavsson, Andreas and Gustafsson, Jan and Lisper, Bj\"{o}rn},
  title =	{{Toward Static Timing Analysis of Parallel Software}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{38--47},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.38},
  URN =		{urn:nbn:de:0030-drops-35552},
  doi =		{10.4230/OASIcs.WCET.2012.38},
  annote =	{Keywords: Parallelism, BCET, WCET, Static analysis, Abstract interpretation}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.48
Towards Parallel Programming Models for Predictability

Authors: Björn Lisper

Abstract
Future embedded systems for performance-demanding applications will be massively parallel. High performance tasks will be parallel programs, running on several cores, rather than single threads running on single cores. For hard real-time applications, WCETs for such tasks must be bounded. Low-level parallel programming models, based on concurrent threads, are notoriously hard to use due to their inherent nondeterminism. Therefore the parallel processing community has long considered high-level parallel programming models, which restrict the low-level models to regain determinism. In this position paper we argue that such parallel programming models are beneficial also for WCET analysis of parallel programs. We review some proposed models, and discuss their influence on timing predictability. In particular we identify data parallel programming as a suitable paradigm as it is deterministic and allows current methods for WCET analysis to be extended to parallel code. GPUs are increasingly used for high performance applications: we discuss a current GPU architecture, and we argue that it offers a parallel platform for compute-intensive applications for which it seems possible to construct precise timing models. Thus, a promising route for the future is to develop WCET analyses for data-parallel software running on GPUs.
Cite as

Björn Lisper. Towards Parallel Programming Models for Predictability. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 48-58, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{lisper:OASIcs.WCET.2012.48,
  author =	{Lisper, Bj\"{o}rn},
  title =	{{Towards Parallel Programming Models for Predictability}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{48--58},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.48},
  URN =		{urn:nbn:de:0030-drops-35565},
  doi =		{10.4230/OASIcs.WCET.2012.48},
  annote =	{Keywords: Real-Time System, WCET analysis, Parallel Program, Data Parallelism}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.59
Timing Analysis of Concurrent Programs

Authors: Robert Mittermayr and Johann Blieberger

Abstract
Worst-case execution time analysis of multi-threaded software is still a challenge. This comes mainly from the fact that the number of thread interleavings grows exponentially in the number of threads and that synchronization has to be taken into account. In particular, a suitable graph based model has been missing. The idea that thread interleavings can be studied with a matrix calculus is a novel approach in this research area. Our sparse matrix representations of the program are manipulated using Kronecker algebra. The resulting graph represents the multi-threaded program and plays a similar role for concurrent systems as control flow graphs do for sequential programs. Thus a suitable graph model for timing analysis of multi-threaded software has been set up. Due to synchronization it turns out that often only very small parts of the resulting graph are actually needed, whereas the rest is unreachable. A lazy implementation of the matrix operations ensures that the unreachable parts are never calculated. This speeds up processing significantly and shows that our approach is very promising.
Cite as

Robert Mittermayr and Johann Blieberger. Timing Analysis of Concurrent Programs. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 59-68, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{mittermayr_et_al:OASIcs.WCET.2012.59,
  author =	{Mittermayr, Robert and Blieberger, Johann},
  title =	{{Timing Analysis of Concurrent Programs}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{59--68},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.59},
  URN =		{urn:nbn:de:0030-drops-35570},
  doi =		{10.4230/OASIcs.WCET.2012.59},
  annote =	{Keywords: Worst-case execution time analysis (WCET), Concurrency, Thread Synchronization, Kronecker Algebra, Program Analysis}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.69
A Time-composable Operating System

Authors: Andrea Baldovin, Enrico Mezzetti, and Tullio Vardanega

Abstract
Time composability is a guiding principle to the development and certification process of real-time embedded systems. Considerable efforts have been devoted to studying the role of hardware architectures - and their modern accelerating features - in enabling the hierarchical composition of the timing behaviour of software programs considered in isolation. Much less attention has been devoted to the effect of real-time Operating Systems (OS) on time composability at the application level. In fact, the very presence of the OS contributes to the variability of the execution time of the application directly and indirectly; by way of its own response time jitter and by its effect on the state retained by the processor hardware. We consider zero disturbance and steady behaviour as those characteristic properties that an operating system should exhibit, so as to be time-composable with the user applications. We assess those properties on the redesign of an ARINC compliant partitioned operating system, for use in avionics applications, and present some experimental results from a preliminary implementation of our approach within the scope of the EU FP7 PROARTIS project.
Cite as

Andrea Baldovin, Enrico Mezzetti, and Tullio Vardanega. A Time-composable Operating System. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 69-80, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{baldovin_et_al:OASIcs.WCET.2012.69,
  author =	{Baldovin, Andrea and Mezzetti, Enrico and Vardanega, Tullio},
  title =	{{A Time-composable Operating System}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{69--80},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.69},
  URN =		{urn:nbn:de:0030-drops-35589},
  doi =		{10.4230/OASIcs.WCET.2012.69},
  annote =	{Keywords: Real-time Operating System, Timing composability, ARINC}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.81
Analysis of WCET in an experimental satellite software development

Authors: Jorge Garrido, Daniel Brosnan, Juan A. de la Puente, Alejandro Alonso, and Juan Zamorano

Abstract
This paper describes a case study in WCET analysis of an on-board spacecraft software system. The attitude control system of UPMSat-2, an experimental micro-satellite which is scheduled to be launched in 2013, is used for an experiment on analysing the worst-case execution time of code automatically generated from a Simulink model. In order to properly test the code, a hardware-in-the-loop configuration with a simulation model of the spacecraft environment has been used as a test bench. The code has been analysed with RapiTime, with some modifications to the original instrumentation routines, in order to take into account the particularities of the test configuration. Results from the experiment are described and commented in the paper.
Cite as

Jorge Garrido, Daniel Brosnan, Juan A. de la Puente, Alejandro Alonso, and Juan Zamorano. Analysis of WCET in an experimental satellite software development. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 81-90, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{garrido_et_al:OASIcs.WCET.2012.81,
  author =	{Garrido, Jorge and Brosnan, Daniel and de la Puente, Juan A. and Alonso, Alejandro and Zamorano, Juan},
  title =	{{Analysis of WCET in an experimental satellite software development}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{81--90},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.81},
  URN =		{urn:nbn:de:0030-drops-35592},
  doi =		{10.4230/OASIcs.WCET.2012.81},
  annote =	{Keywords: Real-time systems, embedded systems, timing analysis, WCET calculation}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.91
A Formal Framework for Precise Parametric WCET Formulas

Authors: Benedikt Huber, Daniel Prokesch, and Peter Puschner

Abstract
Parametric worst-case execution time (WCET) formulas are a valuable tool to estimate the impact of input data properties on the WCET at design time, or to guide scheduling decisions at runtime. Previous approaches to parametric WCET analysis either provide only informal ad-hoc solutions or tend to be rather pessimistic, as they do not take flow constraints other than simple loop bounds into account. We develop a formal framework around path- and frequency expressions, which allow us to reason about execution frequencies of program parts. Starting from a reducible control flow graph and a set of (parametric) constraints, we show how to obtain frequency expressions and refine them by means of sound approximations, which account for more sophisticated flow constraints. Finally, we obtain closed-form parametric WCET formulas by means of partial evaluation. We developed a prototype, implementing our solution to parametric WCET analysis, and compared existing approaches within our setting. As our framework supports fine-grained transformations to improve the precision of parametric formulas, it allows to focus on important flow relations in order to avoid intractably large formulas.
Cite as

Benedikt Huber, Daniel Prokesch, and Peter Puschner. A Formal Framework for Precise Parametric WCET Formulas. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 91-102, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{huber_et_al:OASIcs.WCET.2012.91,
  author =	{Huber, Benedikt and Prokesch, Daniel and Puschner, Peter},
  title =	{{A Formal Framework for Precise Parametric WCET Formulas}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{91--102},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.91},
  URN =		{urn:nbn:de:0030-drops-35608},
  doi =		{10.4230/OASIcs.WCET.2012.91},
  annote =	{Keywords: Worst-case execution time analysis, parametric WCET analysis, path expressions, frequency expressions, algebraic framework}
}
Document
DOI: 10.4230/OASIcs.WCET.2012.103
Evolutionary Techniques for Parametric WCET Analysis

Authors: Amine Marref

Abstract
Estimating the worst-case execution time (WCET) of real-time programs is pivotal in their verification. WCET estimation either yields a numeric value that represents the maximum execution time of the program when executed on a specific hardware platform; or yields a parametric expression in the form of some function of the input which when instantiated with a particular input value, gives a WCET estimation of the program when triggered by this input specifically (on a specific hardware platform). Parametric WCET analysis provides extra accuracy as the WCET estimation can be tuned to particular input values at runtime; and is usually of interest to dynamic-scheduling schemes. In this paper we use genetic programming as an alternative method to approach the problem of parametric WCET analysis. Parametric expressions are captured automatically by the genetic program based on end-to-end executions of the program under analysis. The technique is complementary to static parametric WCET analysis and more amenable to industrial practice. Experimental evaluation shows that the presented technique computes accurate parametric expression in an almost negligible time.
Cite as

Amine Marref. Evolutionary Techniques for Parametric WCET Analysis. In 12th International Workshop on Worst-Case Execution Time Analysis. Open Access Series in Informatics (OASIcs), Volume 23, pp. 103-115, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2012)

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@InProceedings{marref:OASIcs.WCET.2012.103,
  author =	{Marref, Amine},
  title =	{{Evolutionary Techniques for Parametric WCET Analysis}},
  booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
  pages =	{103--115},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-41-5},
  ISSN =	{2190-6807},
  year =	{2012},
  volume =	{23},
  editor =	{Vardanega, Tullio},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2012.103},
  URN =		{urn:nbn:de:0030-drops-35611},
  doi =		{10.4230/OASIcs.WCET.2012.103},
  annote =	{Keywords: Real-time systems, parametric worst-case execution-time analysis, end- to-end testing, genetic programming}
}

Filters

  • Authors
  • A
  • Abdel Maksoud, Mohamed
  • Alonso, Alejandro
  • B
  • Baldovin, Andrea
  • Blieberger, Johann
  • Brosnan, Daniel
  • C
  • Cassez, Franck
  • D
  • de la Puente, Juan A.
  • G
  • Garrido, Jorge
  • Gustafsson, Jan
  • Gustavsson, Andreas
  • H
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  • Huber, Benedikt
  • L
  • Lisper, Björn
  • M
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  • Mezzetti, Enrico
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  • P
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  • Reineke, Jan
  • V
  • Vardanega, Tullio
  • W
  • Wegener, Simon
  • Z
  • Zamorano, Juan

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