10 Search Results for "Becker, Jürgen"


Document
Engineering Academic Software (Dagstuhl Perspectives Workshop 16252)

Authors: Alice Allen, Cecilia Aragon, Christoph Becker, Jeffrey Carver, Andrei Chis, Benoit Combemale, Mike Croucher, Kevin Crowston, Daniel Garijo, Ashish Gehani, Carole Goble, Robert Haines, Robert Hirschfeld, James Howison, Kathryn Huff, Caroline Jay, Daniel S. Katz, Claude Kirchner, Katie Kuksenok, Ralf Lämmel, Oscar Nierstrasz, Matt Turk, Rob van Nieuwpoort, Matthew Vaughn, and Jurgen J. Vinju

Published in: Dagstuhl Manifestos, Volume 6, Issue 1 (2017)


Abstract
Software is often a critical component of scientific research. It can be a component of the academic research methods used to produce research results, or it may itself be an academic research result. Software, however, has rarely been considered to be a citable artifact in its own right. With the advent of open-source software, artifact evaluation committees of conferences, and journals that include source code and running systems as part of the published artifacts, we foresee that software will increasingly be recognized as part of the academic process. The quality and sustainability of this software must be accounted for, both a prioro and a posteriori. The Dagstuhl Perspectives Workshop on "Engineering Academic Software" has examined the strengths, weaknesses, risks, and opportunities of academic software engineering. A key outcome of the workshop is this Dagstuhl Manifesto, serving as a roadmap towards future professional software engineering for software-based research instruments and other software produced and used in an academic context. The manifesto is expressed in terms of a series of actionable "pledges" that users and developers of academic research software can take as concrete steps towards improving the environment in which that software is produced.

Cite as

Alice Allen, Cecilia Aragon, Christoph Becker, Jeffrey Carver, Andrei Chis, Benoit Combemale, Mike Croucher, Kevin Crowston, Daniel Garijo, Ashish Gehani, Carole Goble, Robert Haines, Robert Hirschfeld, James Howison, Kathryn Huff, Caroline Jay, Daniel S. Katz, Claude Kirchner, Katie Kuksenok, Ralf Lämmel, Oscar Nierstrasz, Matt Turk, Rob van Nieuwpoort, Matthew Vaughn, and Jurgen J. Vinju. Engineering Academic Software (Dagstuhl Perspectives Workshop 16252). In Dagstuhl Manifestos, Volume 6, Issue 1, pp. 1-20, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2017)


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@Article{allen_et_al:DagMan.6.1.1,
  author =	{Allen, Alice and Aragon, Cecilia and Becker, Christoph and Carver, Jeffrey and Chis, Andrei and Combemale, Benoit and Croucher, Mike and Crowston, Kevin and Garijo, Daniel and Gehani, Ashish and Goble, Carole and Haines, Robert and Hirschfeld, Robert and Howison, James and Huff, Kathryn and Jay, Caroline and Katz, Daniel S. and Kirchner, Claude and Kuksenok, Katie and L\"{a}mmel, Ralf and Nierstrasz, Oscar and Turk, Matt and van Nieuwpoort, Rob and Vaughn, Matthew and Vinju, Jurgen J.},
  title =	{{Engineering Academic Software (Dagstuhl Perspectives Workshop 16252)}},
  pages =	{1--20},
  journal =	{Dagstuhl Manifestos},
  ISSN =	{2193-2433},
  year =	{2017},
  volume =	{6},
  number =	{1},
  editor =	{Allen, Alice and Aragon, Cecilia and Becker, Christoph and Carver, Jeffrey and Chis, Andrei and Combemale, Benoit and Croucher, Mike and Crowston, Kevin and Garijo, Daniel and Gehani, Ashish and Goble, Carole and Haines, Robert and Hirschfeld, Robert and Howison, James and Huff, Kathryn and Jay, Caroline and Katz, Daniel S. and Kirchner, Claude and Kuksenok, Katie and L\"{a}mmel, Ralf and Nierstrasz, Oscar and Turk, Matt and van Nieuwpoort, Rob and Vaughn, Matthew and Vinju, Jurgen J.},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagMan.6.1.1},
  URN =		{urn:nbn:de:0030-drops-71468},
  doi =		{10.4230/DagMan.6.1.1},
  annote =	{Keywords: Academic software, Research software, Software citation, Software sustainability}
}
Document
10281 Abstracts Collection – Dynamically Reconfigurable Architectures

Authors: Peter M. Athanas, Jürgen Becker, Jürgen Teich, and Ingrid Verbauwhede

Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)


Abstract
From 11.07.10 to 16.07.10, Dagstuhl Seminar 10281 ``Dynamically Reconfigurable Architectures '' was held in Schloss Dagstuhl~--~Leibniz Center for Informatics. During the seminar, several participants presented their current research, and ongoing work and open problems were discussed. Abstracts of the presentations given during the seminar as well as abstracts of seminar results and ideas are put together in this paper. The first section describes the seminar topics and goals in general. Links to extended abstracts or full papers are provided, if available.

Cite as

Peter M. Athanas, Jürgen Becker, Jürgen Teich, and Ingrid Verbauwhede. 10281 Abstracts Collection – Dynamically Reconfigurable Architectures. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-23, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)


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@InProceedings{athanas_et_al:DagSemProc.10281.1,
  author =	{Athanas, Peter M. and Becker, J\"{u}rgen and Teich, J\"{u}rgen and Verbauwhede, Ingrid},
  title =	{{10281 Abstracts Collection – Dynamically Reconfigurable Architectures}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  pages =	{1--23},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2010},
  volume =	{10281},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.1},
  URN =		{urn:nbn:de:0030-drops-28962},
  doi =		{10.4230/DagSemProc.10281.1},
  annote =	{Keywords: Dynamically Run-Time Reconfigurable Computing Architectures, Self- adaptive Systems, Computational Models, Circuit Technologies, System Architecture, Reconfigurable/Adaptive Computing based on Nanotechnologies}
}
Document
10281 Summary – Dynamically Reconfigurable Architectures

Authors: Peter M. Athanas, Jürgen Becker, Jürgen Teich, and Ingrid Verbauwhede

Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)


Abstract
Dynamic and partial reconfiguration of hardware architectures such as FPGAs and coarse grain processing arrays bring an additional level of flexibility in the design of electronic systems by exploiting the possibility of configuring functions on-demand during run-time. When compared to emerging software-programmable Multi-Processor System-on-a-Chip (MPSoC) solutions, they benefit a lot from lower cost, more dedication and fit to a certain problem class as well as power and area efficiency. This has led to many new ways of approaching existing research topics in the area of hardware design and optimization techniques. For example, the possibility of performing adaptation during run-time raises questions in the areas of dynamic control, real-time response, on-line power management and design complexity, since the reconfigurability increases the design space towards infinity.

Cite as

Peter M. Athanas, Jürgen Becker, Jürgen Teich, and Ingrid Verbauwhede. 10281 Summary – Dynamically Reconfigurable Architectures. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)


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@InProceedings{athanas_et_al:DagSemProc.10281.2,
  author =	{Athanas, Peter M. and Becker, J\"{u}rgen and Teich, J\"{u}rgen and Verbauwhede, Ingrid},
  title =	{{10281 Summary – Dynamically Reconfigurable Architectures}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2010},
  volume =	{10281},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.2},
  URN =		{urn:nbn:de:0030-drops-28926},
  doi =		{10.4230/DagSemProc.10281.2},
  annote =	{Keywords: Dynamically Run-Time Reconfigurable Computing Architectures, Self- adaptive Systems, Computational Models, Circuit Technologies, System Architecture, CAD Tool Support, Reconfigurable/Adaptive Computing based on Nanotechnologies}
}
Document
New Directions for IP Core Watermarking and Identification

Authors: Daniel Ziener and Jürgen Teich

Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)


Abstract
In this talk, we present watermarking and identification techniques for FPGA IP cores. Unlike most existing watermarking techniques, the focus of our techniques lies on ease of verification, even if the protected cores are embedded into a product. Moreover, we have concentrated on higher abstraction levels for embedding the watermark, particularly at the logic level, where IP cores are distributed as netlist cores. With the presented watermarking methods, it is possible to watermark IP cores at the logic level and identify them with a high likelihood and in a reproducible way in a purchased product from a company that is suspected to have committed IP fraud. The investigated techniques establish the authorship by verification of either an FPGA bitfile or the power consumption of a given FPGA.

Cite as

Daniel Ziener and Jürgen Teich. New Directions for IP Core Watermarking and Identification. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-13, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)


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@InProceedings{ziener_et_al:DagSemProc.10281.10,
  author =	{Ziener, Daniel and Teich, J\"{u}rgen},
  title =	{{New Directions for IP Core Watermarking and Identification}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  pages =	{1--13},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2010},
  volume =	{10281},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.10},
  URN =		{urn:nbn:de:0030-drops-28437},
  doi =		{10.4230/DagSemProc.10281.10},
  annote =	{Keywords: IP protection, IP cores, watermarking}
}
Document
06141 Abstracts Collection – Dynamically Reconfigurable Architectures

Authors: Jürgen Becker, Jürgen Teich, Gordon Brebner, and Peter M. Athanas

Published in: Dagstuhl Seminar Proceedings, Volume 6141, Dynamically Reconfigurable Architectures (2006)


Abstract
From 02.04.06 to 07.04.06, the Dagstuhl Seminar 06141 ``Dynamically Reconfigurable Architectures'' was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl. During the seminar, several participants presented their current research, and ongoing work and open problems were discussed. Abstracts of the presentations given during the seminar as well as abstracts of seminar results and ideas are put together in this paper. The first section describes the seminar topics and goals in general. Links to extended abstracts or full papers are provided, if available.

Cite as

Jürgen Becker, Jürgen Teich, Gordon Brebner, and Peter M. Athanas. 06141 Abstracts Collection – Dynamically Reconfigurable Architectures. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 6141, pp. 1-26, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2006)


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@InProceedings{becker_et_al:DagSemProc.06141.1,
  author =	{Becker, J\"{u}rgen and Teich, J\"{u}rgen and Brebner, Gordon and Athanas, Peter M.},
  title =	{{06141 Abstracts Collection – Dynamically Reconfigurable Architectures}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  pages =	{1--26},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2006},
  volume =	{6141},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and Gordon Brebner and J\"{u}rgen Teich},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.06141.1},
  URN =		{urn:nbn:de:0030-drops-8383},
  doi =		{10.4230/DagSemProc.06141.1},
  annote =	{Keywords: Dynamically run-time reconfigurable computing architectures, adaptive systems, computational models, circuit technologies, system architecture, CAD tool support}
}
Document
06141 Executive Summary – Dynamically Reconfigurable Architectures

Authors: Jürgen Becker, Jürgen Teich, Gordon Brebner, and Peter M. Athanas

Published in: Dagstuhl Seminar Proceedings, Volume 6141, Dynamically Reconfigurable Architectures (2006)


Abstract
Dynamic and partial reconfiguration of hardware architectures such as FPGAs and XPPs brings an additional level of flexibility in the design of electronic systems by exploiting the possibility of configuring functions on-demand during run-time. This has led to many new ways of approaching existing research topics in the area of hardware design and optimization techniques. For example, the possibility of performing adaptation during run-time raises questions in the areas of dynamic control, real-time response, on-line power management and design complexity, since the reconfigurability increases the design space towards infinity. This Dagstuhl Seminar on Reconfigurable Architectures has aimed at raising a few of these topics e.g. on-line placement, pre-routing/on-line routing trade-off, power minimization etc., and also at presenting novel ideas on how to overcome the difficulties introduced in dynamic reconfigurable systems.

Cite as

Jürgen Becker, Jürgen Teich, Gordon Brebner, and Peter M. Athanas. 06141 Executive Summary – Dynamically Reconfigurable Architectures. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 6141, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2006)


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@InProceedings{becker_et_al:DagSemProc.06141.2,
  author =	{Becker, J\"{u}rgen and Teich, J\"{u}rgen and Brebner, Gordon and Athanas, Peter M.},
  title =	{{06141 Executive Summary – Dynamically Reconfigurable Architectures}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2006},
  volume =	{6141},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and Gordon Brebner and J\"{u}rgen Teich},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.06141.2},
  URN =		{urn:nbn:de:0030-drops-8372},
  doi =		{10.4230/DagSemProc.06141.2},
  annote =	{Keywords: Reconfigurable Computing, Reconfigurable Supercomputing, Organic Computing, Dynamic Reconfiguration, Reconfigurable Hardware}
}
Document
Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine

Authors: Diana Göhringer, Mateusz Majer, and Jürgen Teich

Published in: Dagstuhl Seminar Proceedings, Volume 6141, Dynamically Reconfigurable Architectures (2006)


Abstract
We present an FPGA-based reconfigurable platform called Erlangen Slot Machine (ESM). The main advantages of this platform are: First, the possibility for each module to access peripherals independent from its location through a programmable crossbar, and local SRAM banks for individual modules. This physical design eases the implementation of run-time reconfigurable partial modules and enables an unrestricted relocation of modules on the device. We present our two-board ESM implementation and demonstrate a partially reconfigurable video filter application as well as a relocatable computer game including a dedicated inter-module communication scheme.

Cite as

Diana Göhringer, Mateusz Majer, and Jürgen Teich. Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 6141, pp. 1-11, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2006)


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@InProceedings{gohringer_et_al:DagSemProc.06141.5,
  author =	{G\"{o}hringer, Diana and Majer, Mateusz and Teich, J\"{u}rgen},
  title =	{{Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  pages =	{1--11},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2006},
  volume =	{6141},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and Gordon Brebner and J\"{u}rgen Teich},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.06141.5},
  URN =		{urn:nbn:de:0030-drops-7369},
  doi =		{10.4230/DagSemProc.06141.5},
  annote =	{Keywords: FPGA-based reconfigurable platform, inter-module communication, crossbar, video filter demo}
}
Document
Physical 2D Morphware and Power Reduction Methods for Everyone

Authors: Jürgen Becker, Michael Hübner, and Katarina Paulsson

Published in: Dagstuhl Seminar Proceedings, Volume 6141, Dynamically Reconfigurable Architectures (2006)


Abstract
Dynamic and partial reconfiguration discovers more and more the focus in academic and industrial research. Modern systems in e.g. avionic and automotive applications exploit the parallelism of hardware in order to reduce power consumption and to increase performance. State of the art reconfigurable FPGA devices allows reconfiguring parts of their architecture while the other configured architecture stays undisturbed in operation. This dynamic and partial reconfiguration allows therefore adapting the architecture to the requirements of the application while run-time. The difference to the traditional term of software and its related sequential architecture is the possibility to change the paradigm of brining the data to the respective processing elements. Dynamic and partial reconfiguration enables to bring the processing elements to the data and is therefore a new paradigm. The shift from the traditional microprocessor approaches with sequential processing of data to parallel processing reconfigurable architectures forces to introduce new paradigms with the focus on computing in time and space.

Cite as

Jürgen Becker, Michael Hübner, and Katarina Paulsson. Physical 2D Morphware and Power Reduction Methods for Everyone. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 6141, pp. 1-5, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2006)


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@InProceedings{becker_et_al:DagSemProc.06141.11,
  author =	{Becker, J\"{u}rgen and H\"{u}bner, Michael and Paulsson, Katarina},
  title =	{{Physical 2D Morphware and Power Reduction Methods for Everyone}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  pages =	{1--5},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2006},
  volume =	{6141},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and Gordon Brebner and J\"{u}rgen Teich},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.06141.11},
  URN =		{urn:nbn:de:0030-drops-7399},
  doi =		{10.4230/DagSemProc.06141.11},
  annote =	{Keywords: 2D online placement and routing, Reconfigurable Computing}
}
Document
QUKU: A Coarse Grained Paradigm for FPGAs

Authors: Sunil Shukla, Neil W. Bergmann, and Jürgen Becker

Published in: Dagstuhl Seminar Proceedings, Volume 6141, Dynamically Reconfigurable Architectures (2006)


Abstract
To fill the gap between increasing demand for reconfigurability and performance efficiency, CGRAs are seen to be an emerging platform. The advantage lies in quick dynamic reconfiguration and power efficiency. Despite having these advantages they have failed to show their mark. This paper describes the QUKU architecture, which uses a coarse-grained dynamically reconfigurable PE array (CGRA) overlaid on an FPGA. The low-speed reconfigurability of the FPGA is used to optimize the CGRA for different applications, whilst the high-speed CGRA reconfiguration is used within an application for operator re-use.

Cite as

Sunil Shukla, Neil W. Bergmann, and Jürgen Becker. QUKU: A Coarse Grained Paradigm for FPGAs. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 6141, pp. 1-8, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2006)


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@InProceedings{shukla_et_al:DagSemProc.06141.13,
  author =	{Shukla, Sunil and Bergmann, Neil W. and Becker, J\"{u}rgen},
  title =	{{QUKU: A Coarse Grained Paradigm for FPGAs}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  pages =	{1--8},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2006},
  volume =	{6141},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and Gordon Brebner and J\"{u}rgen Teich},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.06141.13},
  URN =		{urn:nbn:de:0030-drops-7424},
  doi =		{10.4230/DagSemProc.06141.13},
  annote =	{Keywords: FPGA, CGRA, Reconfiguration}
}
Document
Dynamically Reconfigurable Architectures (Dagstuhl Seminar 03301)

Authors: Peter M. Athanas, Jürgen Becker, Gordon Brebner, and Hossam El Gindy

Published in: Dagstuhl Seminar Reports. Dagstuhl Seminar Reports, Volume 1 (2021)


Abstract

Cite as

Peter M. Athanas, Jürgen Becker, Gordon Brebner, and Hossam El Gindy. Dynamically Reconfigurable Architectures (Dagstuhl Seminar 03301). Dagstuhl Seminar Report 387, pp. 1-5, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2003)


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@TechReport{athanas_et_al:DagSemRep.387,
  author =	{Athanas, Peter M. and Becker, J\"{u}rgen and Brebner, Gordon and El Gindy, Hossam},
  title =	{{Dynamically Reconfigurable Architectures (Dagstuhl Seminar 03301)}},
  pages =	{1--5},
  ISSN =	{1619-0203},
  year =	{2003},
  type = 	{Dagstuhl Seminar Report},
  number =	{387},
  institution =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemRep.387},
  URN =		{urn:nbn:de:0030-drops-152673},
  doi =		{10.4230/DagSemRep.387},
}
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